Introduction


The UART operations are controlled by the configuration and mode registers. The state of the FIFOs, modem signals, and other controller functions are read using the status, interrupt
status, and modem status registers.The controller is structured with separate RX and TX data paths. Each path includes a 64-byte FIFO. The controller serializes and deserializes data
in the TX and RX FIFOs and includes a mode switch to support various loopback configurations for the RxD and TxD signals. The FIFO interrupt status bits support polling or interrupt
driven handler. Software reads and writes data bytes using the RX and TX data port registers.When using the UART in a modem-like application, the modem control module detects and
generates the modem handshake signals and also controls the receiver and transmitter paths according to the handshaking protocol.
The PS Uart is in Zynq Ultrascale+ MpSoC and Zynq platforms.

HW IP Features


Features supported in driver


Missing Features, Known Issues and Limitations


Kernel Configuration

To enable the uart driver in the linux kernel you either have to integrate it or build it as kernel module (.ko). you can enable it with:
CONFIG_SERIAL_XILINX_PS_UART=y
CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
When more than two UARTs are required in the system (including PL UARTs) the user should also configure the following configuration item to increase the number of UART ports.
The driver statically allocates port data structures based on this configuration item. A kernel error similar to "Cannot get uart_port structure" may be seen during kernel boot when this is an issue.
CONFIG_SERIAL_XILINX_NR_UARTS=<number of expected UARTs>
Devicetree
Here's how the devicetree entry could look like.
https://www.kernel.org/doc/Documentation/devicetree/bindings/serial/cdns%2Cuart.txt

        uart0: serial@e0000000 {
            compatible = "xlnx,xuartps", "cdns,uart-r1p8";
            clocks = <&clkc 23>, <&clkc 40>;
            clock-names = "uart_clk", "pclk";
            reg = <0xE0000000 0x1000>;
            interrupts = <0 27 4>;
        };

Test procedure



stty-Linux Commands Related to configuration and Testing:


UART BREAK DETECTION:





root@Xilinx-ZynqMP-EAApr2015:~# cat  /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:16 tx:21556 rx:401 brk:1 RTS|CTS|DTR|DSR|CD
 

Expected Output

root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:1008 rx:51 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:0 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# [   79.344585] sysrq: SysRq : HELP : loglevel(0-9) reboot(b) crash(c) terminate-all-tasks(e) memory-full-oom-kill(f) kill-all-tasks(i) thaw-filesystems(j) show-backtrace-all-active-cpus(l) show-memory-usage(m) nice-all-RT-tasks(n) poweroff(o) show-registers(p) show-all-timers(q) sync(s) show-task-states(t) unmount(u) show-blocked-tasks(w) dump-ftrace-buffer(z)
 
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:1267 rx:64 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:0 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# stty -F /dev/ttyPS0 -a
speed 115200 baud;stty: /dev/ttyPS0
 line = 0;
intr = ^C; quit = ^\; erase = ^?; kill = ^U; eof = ^D; eol =
; eol2 = <undef>;
swtch = <undef>; start = ^Q; stop = ^S; susp = ^Z; rprnt = ^R; werase = ^W;
lnext = ^V; flush = ^O; min = 1; time = 0;
-parenb -parodd cs8 hupcl -cstopb cread clocal -crtscts
-ignbrk -brkint -ignpar -parmrk -inpck -istrip -inlcr -igncr icrnl ixon ixoff
-iuclc -ixany -imaxbel -iutf8
opost -olcuc -ocrnl onlcr -onocr -onlret -ofill -ofdel nl0 cr0 tab0 bs0 vt0 ff0
isig icanon -iexten echo echoe echok -echonl -noflsh -xcase -tostop -echoprt
echoctl echoke
root@Xilinx-ZCU102-2015_4:~# stty -F /dev/ttyPS1 -a
speed 9600 baud;stty: /dev/ttyPS1
 line = 0;
intr = ^C; quit = ^\; erase = ^?; kill = ^U; eof = ^D; eol = <undef>;
eol2 = <undef>; swtch = <undef>; start = ^Q; stop = ^S; susp = ^Z; rprnt = ^R;
werase = ^W; lnext = ^V; flush = ^O; min = 1; time = 0;
-parenb -parodd cs8 hupcl -cstopb cread clocal -crtscts
-ignbrk -brkint -ignpar -parmrk -inpck -istrip -inlcr -igncr icrnl ixon -ixoff
-iuclc -ixany -imaxbel -iutf8
opost -olcuc -ocrnl onlcr -onocr -onlret -ofill -ofdel nl0 cr0 tab0 bs0 vt0 ff0
isig icanon iexten echo echoe echok -echonl -noflsh -xcase -tostop -echoprt
echoctl echoke
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:2975 rx:162 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:1 brk:1 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# stty -F /dev/ttyPS1 inpck
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:3646 rx:200 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:2 fe:1 brk:1 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:4042 rx:215 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:7 fe:6 brk:1 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# stty -F /dev/ttyPS1 parenb
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:4835 rx:263 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:8 fe:6 pe:1 brk:1 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:5236 rx:278 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:9 fe:6 pe:1 brk:2 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~# cat < /dev/ttyPS1[  363.850712] random: nonblocking pool is initialized
 
^C
root@Xilinx-ZCU102-2015_4:~# cat /proc/tty/driver/xuartps
serinfo:1.0 driver revision:
0: uart:xuartps mmio:0xFF000000 irq:204 tx:5637 rx:293 brk:1 RTS|CTS|DTR|DSR|CD
1: uart:xuartps mmio:0xFF010000 irq:205 tx:0 rx:13 fe:6 pe:5 brk:2 CTS|DSR|CD
root@Xilinx-ZCU102-2015_4:~#

Mainline status

This driver is currently in sync with mainline kernel driver.

Change Log

2023.2

Summary:

Commits:

dd19c98Revert "tty: xilinx_uartps: Make the timeout unsigned"

f2a7265Revert "tty: xilinx_uartps: Add check for runtime_get_sync calls"


2023.1

Summary:

Commits:

a28ef75serial: xilinx_uartps: return early in cdns_uart_handle_tx()

08814cdserial: xilinx_uartps: cache xmit in cdns_uart_handle_tx()
ec33b19tty: xilinx_uartps: Check clk_enable return value
7bdd444tty: xilinx_uartps: Update copyright text to correct format
03a9480tty: xilinx_uartps: Initialise the read_status_mask
b8a6c3btty: xilinx_uartps: Fix the ignore_status
b369628tty: xilinx_uartps: Prevent writes when the controller is disabled
a17fa12tty: xilinx_uartps: Add timeout waiting for loop
ec33b19tty: xilinx_uartps: Check the clk_enable return value
bec5b81serial: Make ->set_termios() old ktermios const
12f014ftty: xilinx_uartps: Add check for runtime_get_sync calls

588845dtty: xilinx_uartps: Make the timeout unsigned

ee4ee95serial: uartps: Fix stuck ISR if RX disabled with non-empty FIFO
f2a7265Revert "tty: xilinx_uartps: Add check for runtime_get_sync calls"
dd19c98Revert "tty: xilinx_uartps: Make the timeout unsigned"

2022.2

Summary:

Commits:

6a9e37etty: serial: uartps: add missing mutex_unlock in cdns_get_id()

2022.1


Related Links