The XilSKey library provides APIs for programming and reading eFUSE bits and for programming the battery-backed RAM (BBRAM). Each SoC has different configuration of eFUSEs and BBRAM. Following list gives features with respect to each device.
Supports for both mono or SSIT devices.
Refer following documents for detailed information on BBRAM and eFUSE functionality.
eFUSE bits are one-time programmable. Once they are programmed(burnt), they cannot be modified. |
XilSKey library APIs divided into two parts – BBRAM APIs and eFUSE APIs. Following section gives glimpse of API functions of XilSKey library.
XilSKey_ZynqMp_Bbram_Program | Writes input AES red key in BBRAM and verifies the write |
XilSKey_ZynqMp_Bbram_Zeroise | Zeroize's Key stored in BBRAM |
Processing Systems (PS) eFUSE API | |
---|---|
XilSKey_ZynqMp_EfusePs_CheckAesKeyCrc | Performs CRC check of AES key stored in eFUSE |
XilSKey_ZynqMp_EfusePs_ReadUserFuse | Reads user eFUSE from eFUSE or cache |
XilSKey_ZynqMp_EfusePs_ReadPpk0Hash | Reads PPK0 hash from eFUSE or cache |
XilSKey_ZynqMp_EfusePs_ReadPpk1Hash | Reads PPK1 hash from eFUSE or cache |
XilSKey_ZynqMp_EfusePs_ReadSpkId | Reads SPK_ID hash from eFUSE or cache |
XilSKey_ZynqMp_EfusePs_ReadDna | Reads ZynqMP SoC DNA from eFUSE |
XilSKey_ZynqMp_EfusePs_ReadSecCtrlBits | Read the PS eFUSE secure control bits from eFUSE or cache |
XilSKey_ZynqMp_EfusePs_Write | Program the PS eFUSE of ZynqMP |
XilSKey_ZynqMp_EfusePs_WritePufHelprData | Programs the PS eFUSE's with PUF helper data |
XilSKey_ZynqMp_EfusePs_ReadPufHelprData | Reads the PS eFUSE's with PUF helper data |
XilSKey_ZynqMp_EfusePs_WritePufChash | Programs eFUSE's with PUF Chash value |
XilSKey_ZynqMp_EfusePs_ReadPufChash | Reads eFUSE's with PUF Chash value |
XilSKey_ZynqMp_EfusePs_WritePufAux | Programs eFUSE PUF Auxiliary Data |
XilSKey_ZynqMp_EfusePs_ReadPufAux | Reads eFUSE PUF Auxiliary Data |
Programmable Logic (PL) eFUSE API | |
XilSKey_EfusePl_Program | Programs PL eFUSE with input data |
XilSKey_EfusePl_ReadStatus | Reads the PL eFUSE status bits and gets all Secure and Control bits |
XilSKey_EfusePl_ReadKey | Verifies the input CRC matches with CRC of AES Key stored in eFUSE. It also initializes the timer, XADC and JTAG server subsystems, if not already done so. |
XilSKey_CrcCalculation | Calculates CRC value of provided key in string format |
XilSkey_CrcCalculation_AesKey | Calculates CRC value of provided key in binary format |
XilSKey_Write_Puf_EfusePs_SecureBits | Programs the eFUSE PUF Secure Bits |
XilSKey_Read_Puf_EfusePs_SecureBits | Read the PS eFUSE PUF Secure Bits from eFUSE or cache |
XilSKey_Puf_Registration | Registration/Re-registration of PUF |
XilSKey_Puf_Regeneration | Regenerates PUF data |
None
None
Zynq Ultrascale plus
Ultrascale/Ultrascale plus device
Generic
2020.1
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