Table of Contents
Document History
Date | Version | Author | Description of Revisions |
11/11/2016 | 1.0 | Rajesh Gugulothu | Initial Release |
21/02/2017 | 2.0 | Rajesh Gugulothu | Updated with 2016.4 tools Release and Added design files to support zcu102 Rev-B/Rev-D ,Rev-1.0 boards |
10/07/2017 | 3.0 | Rajesh Gugulothu | Updated with 2017.1 tools Release and Added design files to support zcu102 Rev-D2 with production silicon,Rev-1.0 boards with production silicon and Rev 1.0 board. |
14/06/2018 | 4.0 | Surender Polsani | Updated with 2018.1 tools Release and Added design files to support zcu102 Rev-D2 with production silicon,Rev-1.0 boards with production silicon and Rev 1.0 board. |
Implementation Details | |
Design Type | PS Only |
SW Type | Linux |
CPUs | Quad-core ARM® Cortex™-A53 Application Processing Unit,ARM® Mali-400 MP2 Graphics Processing Unit |
PS Features | DDR controller,UART,SD/eMMC interface, USB 3.0,DisplayPort |
Boards/Tools | ZCU102 Rev-B/Rev-D,Rev 1.0 with production silicon,Rev-1.0 |
Xilinx Tools Version | SDK 2018.1 |
Other Details | ARM® DS-5 Development Streamline performance analyzer |
Host Type | Windows 64-bit |
Files Provided | |
ARM_Streamline_Performance_Analyzer.zip | Archive file contains the Design_files directory. |
Fig:setting target IP address in streamline tool |
Fig:capture and analysis wizard |
Fig:selecting counter configure option |
Fig:counter configure wizard |
Fig:selecting start capture option |
Fig: GPU performance metrics information |