Table of Contents
Date | Version | Author | Description of Revisions |
05/12/2016 | 1.0 | Rutuja Chavan & Rajesh Gugulothu | Initial version |
02/15/2017 | 1.1 | Rutuja Chavan | 1. Updated to 2016.4 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D Boards |
05/17/2017 | 2.0 | Rajesh Gugulothu | 1. Updated to 2017.1 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D Prod silicon Boards |
12/06/2018 | 2.1 | Surender Polsani | 1. Updated to 2018.1 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D Prod silicon Boards |
Implementation Details | |
Design Type | PS Only |
SW Type | Zynq® UltraScale+™ MPSoC Linux OS |
CPUs | ARM Cortex A53 Core 0 running at 1.1 GHz |
PS Features |
|
Boards/Tools | ZCU102 Rev1.0 board, ZCU102 Rev B/C/ D Prod silicon boards |
Xilinx Tools Version | Xilinx SDK 2018.1, Petalinux 2018.1 |
Other Details | -- |
Files Provided | |
Zynqmp_CDC_design_files_2018_1.zip | See Appendix A for the descriptions of the files |
Figure 1: Zynq ultrascale + MPSoC USB 3.0 CDC reference block diagram |
Figure 2: Linux kernel configuration withUSB 3.0 device mode CDC ACM support |
Figure 3: Linux kernel configuration for Userspace-driven configuration filesystem |
Figure 4: ZCU102 board setup for Communication device class |
Figure 5: SD boot mode switch setting for ZCU102 Rev B/C/D Board |
Figure 6: SD boot mode settings for ZCU102 Rev1.0 board |
Figure 7: Zynqmp linux console after successful installation |
Figure 8: Gadget driver after successful installation> |
Figure 9: Serial terminal shows successful transfer of data from target board to host machine |
Figure 10: Serial terminal shows successful transfer of data from host machine to target board |
Figure 11: Inspecting log for successful device installation |
Figure 12: Sending data over USB 3.0 ttyGS0 |
Figure 13: Reading data on ttyACM0 |
Figure 14: Sending data over ttyACM0 |
Figure 15: Reading data on target at ttyGS0 |