Table of Contents

Introduction

The Xilinx® Video PHY Controller LogiCORE™ IP core is designed for enabling plug-and-play connectivity with Video (DisplayPort and HDMI® technology) MAC Transmit or Receive subsystems. VideoPhy driver supports only HDMI protocol as of now. 
The interface between the video MAC and PHY layers are standardized to enable ease of use in accessing shared transceiver resources. The AXI4-Lite register interface is provided to enable dynamic accesses of transceiver controls/status


Video IP Layer

Driver Overview

The PHY is intended to simplify the use of serial transceivers and adds domain-specific configurability. The Video PHY Controller IP/Driver is not intended to be used as a stand alone IP and must be used with Xilinx Video MACs such as HDMI 1.4/2.0 Transmitter/Receiver Subsystems and DisplayPort TX/RX Subsystems.

As such PHY Linux Driver is implemented within the kernel PHY framework and is tightly coupled with HDMI Rx/Tx Linux drivers. This driver also hosts the common video files shared between the 3 Xilinx connectivity drivers (Vphy, HDMI Rx and HDMI Tx) and exports the relevant API’s for inter-driver communication. On kernel boot-up both HDMI Rx & Tx drivers will request 3 PHY lanes each for Rx & Tx and will defer until PNY driver has been initialized.

IP/Driver Features



IP Feature 2018.1 - 2019.1 2019.2 and onward 2020.1 - 2023.2
IP Version Supported2.22.22.2

AXI4-Lite support for register accesses

YYY

Protocol Support: Display Port, HDMI

Only HDMIOnly HDMIDisplayPort and HDMI

Full transceiver dynamic reconfiguration port (DRP) accesses and transceiver functions

YYY

Independent TX and RX path line rates (device specific)

YYY

Single quad support

YYY

Phase-locked loop (PLL) switching support from software

YYY

Transmit and Receiver user clocking

YYY

Protocol specific functions (For example, HDMI Clock Detector)

Y

Y

Y

Non-integer data recovery unit (NI-DRU) support for lower line rates. NI-DRU support is for the HDMI protocol only.

YYY

Advanced Clocking Support

NNY
Use of 4th GT channel as TX TMDS clockNYY


HW IP Configuration

Only below depicted IP configuration is supported at this time


Known Issues and Limitations

Kernel Configuration Options for Driver

2018.1 and onwards: CONFIG_ARCH_ZYNQMP and CONFIG_GENERIC_PHY should be enabled
Driver is added as an out-of-tree kernel module and therefore requires no driver specific kernel configuration However to enable the driver user must include it in the rootfs. Following steps are required enable the driver
CONFIG_kernel-module-hdmi
IMAGE_INSTALL_append = " kernel-module-hdmi"
% petalinux-config -c rootfs
%petalinux-build

Device Tree Binding

The dts node should be defined with correct hardware configuration. How to define the node is documented in
2021.2: Documentation/devicetree/bindings/xlnx,vphy.txt
2021.1: Documentation/devicetree/bindings/xlnx,vphy.txt
2020.2: Documentation/devicetree/bindings/xlnx,vphy.txt
2020.1: Documentation/devicetree/bindings/xlnx,vphy.txt
2019.2: Documentation/devicetree/bindings/xlnx,vphy.txt
2019.1: Documentation/devicetree/bindings/xlnx,vphy.txt
2018.3: Documentation/devicetree/bindings/xlnx,vphy.txt
2018.1: Documentation/devicetree/bindings/xlnx,vphy.txt

DEBUG Capability

Video PHY Linux driver implements the capability to tap IP status at pre-defined points in the control flow. User can enable the debug taps by uncommenting the pre-processor directive (#define DEBUG) to monitor the progress within the driver. All debug prints are sent to serial console and can be viewed in kernel dmesg buffer

How to capture vphy state machine logs

Run below command to print the vphy state machine logs or vphy information

# For Logs, run anyone of the below. It will give logs for both TX and RX state machine logs of vphy. Do note that its a destructive logging. Once you run below command, the logs buffer will become empty.
cat /sys/devices/platform/amba_pl\@0/80080000.v_hdmi_tx_ss/vphy_info
or
cat /sys/devices/platform/amba_pl\@0/80000000.v_hdmi_rx_ss/vphy_log

# For vphy info, run below commands
cat /sys/devices/platform/amba_pl\@0/80080000.v_hdmi_tx_ss/vphy_log
or
cat /sys/devices/platform/amba_pl\@0/80000000.v_hdmi_rx_ss/vphy_info

How to capture register dump

Create a script on target and name it as dumpmem.sh. Paste below content in that script.

#!/bin/sh
# Usage dumpmem.sh ADDR OFFSET
base=$1
counter=0
while [ $counter -lt $2 ];
do
    offset=$(($counter*4))
    reg_addr=$(($base + $offset))
    reg_addr=`printf "0x%X\n" $reg_addr`
    output=$(devmem $reg_addr)
    delimiter=": "
    echo $reg_addr$delimiter$output
    counter=$(($counter+1))
done
echo All done

Now run below command to dump the registers of Vphy

# In the below command, first parameter is the base address of the IP (vphy) in this case and second parameter is the number of registers to be read
./dumpmem.sh 0x80120000 206


Boards Supported

Driver has been tested on following boards

Driver has been tested with HDMI FrameBuffer Example Design design


Change Log

2024.1

2023.2

2023.1

2022.2

2022.1

2021.2

2021.1

2020.2

2020.1

2019.2

2019.1

2018.3

2018.1

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