This page gives an overview of the bare-metal driver support for the PS GPIO controller.
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver name | Driver path in Vitis | Path in Git Hub |
---|---|---|
gpiops | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/gpiops | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops |
Directory | Description |
---|---|
src | Driver source files, make and cmakelists file |
examples | Example applications that show how to use the driver features |
doc | Provides the API and data structure details |
data | Driver .tcl, .yaml and .mdd file |
Note: AMD Xilinx embeddedsw build flow has been changed from 2023.2 release to adapt to the new system device tree based flow. For further information, refer to the wiki link Porting embeddedsw components to system device tree (SDT) based flow
The .yaml(in data folder) and CMakeLists.txt(in src folder) files are needed for the System Device Tree based flow. The Driver .tcl and .mdd files are for the older build flow which will be deprecated in future.
For a full list of features supported by this IP, please refer Chapter 27: Real Time Clock in Zynqmp Trm
The two GPIO controllers have the same functionality. There are a total of 174 channels in two
controllers:
PMC GPIO controller:
Two banks (26 channels each) to PMC MIO
Two banks (32 channels each) to PL EMIO
LPD GPIO controller:
One bank (26 channels) to LPD MIO
One bank (32 channels) to PL EMIO
The function of each GPIO can be dynamically programmed on an individual or group basis.
Enable, bit or bank data write, output enable and direction controls.
Programmable interrupts on individual GPIO basis
Status read of raw and masked interrupt.
Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
The Gpiops Standalone driver support the below things.
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops/examples
Test Name | Example source | Description |
---|---|---|
Polled | xgpiops_polled_example.c | This example provides the usage of API's for reading/writing to the individual pins. |
Interrupt | xgpiops_intr_example.c | This example shows the usage of the driver in interrupt mode. It uses the interrupt capability of the GPIO to detect push button events and set the output LED based on the input. |
Expected Output
xgpiops_polled_example.c OUTPUT: GPIO Polled Mode Example Test Data read from GPIO Input is 0x0 Successfully ran GPIO Polled Mode Example Test xgpiops_intr_example.c OUTPUT: GPIO Interrupt Example Test Push Switch button to exit Successfully ran GPIO Interrupt Example Test |
Directory | Description |
---|---|
src | Driver source files |
examples | Example applications that show how to use the driver features |
doc | Provides the API and data structure details |
data | Driver .tcl and .mdd file |
For a full list of features supported by this IP, please refer Chapter 27: Real Time Clock in Zynqmp Trm
The two GPIO controllers have the same functionality. There are a total of 174 channels in two
controllers:
PMC GPIO controller:
Two banks (26 channels each) to PMC MIO
Two banks (32 channels each) to PL EMIO
LPD GPIO controller:
One bank (26 channels) to LPD MIO
One bank (32 channels) to PL EMIO
The function of each GPIO can be dynamically programmed on an individual or group basis.
Enable, bit or bank data write, output enable and direction controls.
Programmable interrupts on individual GPIO basis
Status read of raw and masked interrupt.
Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).
The Gpiops Standalone driver support the below things.
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/gpiops/examples
Test Name | Example source | Description |
---|---|---|
Polled | xgpiops_polled_example.c | This example provides the usage of API's for reading/writing to the individual pins. |
Interrupt | xgpiops_intr_example.c | This example shows the usage of the driver in interrupt mode. It uses the interrupt capability of the GPIO to detect push button events and set the output LED based on the input. |
Expected Output
xgpiops_polled_example.c OUTPUT: GPIO Polled Mode Example Test Data read from GPIO Input is 0x0 Successfully ran GPIO Polled Mode Example Test xgpiops_intr_example.c OUTPUT: GPIO Interrupt Example Test Push Switch button to exit Successfully ran GPIO Interrupt Example Test |
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2023.1/doc/ChangeLog#L242
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2022.2/doc/ChangeLog#L100
None
None
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2021.1/doc/ChangeLog#L433
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/doc/ChangeLog#L201
https://github.com/Xilinx/embeddedsw/blob/release-2020.1/doc/ChangeLog#L47
https://github.com/Xilinx/embeddedsw/blob/release-2019.2/doc/ChangeLog#L23
https://github.com/Xilinx/embeddedsw/blob/release-2019.1/doc/ChangeLog#L367
https://github.com/Xilinx/embeddedsw/blob/release-2018.3/doc/ChangeLog#L133