Date |
Version |
Author |
Description of Revisions |
05/12/2016 |
1.0 |
Rutuja Chavan & Rajesh Gugulothu |
Initial Version |
17/02/2017 |
1.1 |
Rutuja Chavan |
1. Updated to 2016.4 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D Boards |
16/05/2017 |
2.0 |
Rajesh Gugulothu |
1. Updated to 2017.1 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D prod silicon Boards |
11/06/2018 |
2.1 |
Surender Polsani |
1. Updated to 2018.1 tool version 2. Designed for ZCU102 Rev1.0 and RevB/C/D prod silicon Boards |
Implementation Details |
|
Design Type |
PS Only |
SW Type |
Zynq® UltraScale+™ MPSoC Linux |
CPUs |
ARM Cortex A53 Core 0 running at 1.1 GHz |
PS Features |
|
Boards/Tools |
ZCU102 Prod silicon Boards (B/C/D) ZCU102 Rev 1.0 Board |
Xilinx Tools Version |
Xilinx petalinux SDK 2018.1 or latest |
Other Details |
-- |
Files Provided |
|
Zynqmp_mass_storage_design_files_2018_1.zip |
See Appendix A for the descriptions of the design files |
Figure 1: Zynq ultrascale + MPSoC USB 3.0 mass storage device reference block diagram |
Figure 2: Linux kernel configuration enable USB for mass storage mode |
Figure 3: Linux kernel configuration to enable userspace driven configuration |
Figure 4: ZCU102 board setup in device mode |
Figure 5: SD boot mode switch setting for ZCU102 board |
Figure 6: SD boot mode switch setting for ZCU102 Rev1.0 board |
Figure 7: Windows disk format wizard |