Introduction
Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver Name | Path in Vitis | Path in Github |
---|---|---|
spips | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/spips | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/spips |
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spips
The driver source code is organized into different folders. The table below shows the spips driver source organization.
Directory | Description |
---|---|
doc | Provides the API and data structure details |
data | Driver .tcl and .mdd file |
examples | Example applications that show how to use the driver features |
src | Driver source files |
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 67: SPI Controller in Versal TRM.
Features
- Master mode
- Slave mode
- All SPI flash instructions
- Support for 3 slaves - can be extended using a 3 to 8 decoder
- Driver uses manual chip select and auto start options
- Programmable clock frequency, polarity and phase
- Interrupt support
Known Issues and Limitations
Supported Flash vendors
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab
Links to Examples
Examples Path:
https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spips/examples
Test Name | Example Source | Description |
---|---|---|
SPIPS Interrupt Mode Example | xspips_flash_intr_example.c | This examples does basic read and write test from the SPI-NOR flash device in Interrupt mode |
SPIPS PolledMode Example | xspips_flash_polled_example.c | This examples does basic read and write test from the SPI-NOR flash device in Polled mode |
SPIPS Self Test Example | xspips_selftest_example.c | This examples does basic hardware connection check |
SPIPS Interrupt Mode EEPROM Example | xspips_eeprom_intr_example.c | This examples does basic read and write test from the SPI EEPROM device in Interrupt mode |
SPIPS Polled Mode EEPROM Example | xspips_eeprom_polled_example.c | This examples does basic read and write test from the SPI EEPROM device in Polled mode |
SPIPS Slave Mode Polled Example | xspips_slave_polled_example.c | This example does basic read write as Slave device in Polled Mode |
Example Application Usage
SPIPS Interrupt Mode Example
This examples does basic read and write test from the flash device in Interrupt mode.
SPI FLASH Interrupt Example Test ID : BF ID : 26 ID : 51 ID : BF Successfully ran SPI FLASH Interrupt Example Test |
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SPIPS Polled Mode Example
This examples does basic read and write test from the flash device in Polled mode.
SPI SerialFlash Polled Example Test ID : BF ID : 26 ID : 51 ID : BF Successfully ran SPI SerialFlash Polled Example Test |
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SPIPS Self Test Example
This examples does basic hardware connection check.
SPI Selftest Example Successfully ran SPI Selftest Example |
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Example Design Architecture
NA
Performance
Change Log
2021.1
https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L473
2020.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L1565
2020.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L533
2019.2
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L82
2019.1
https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L159