Table of Contents

The pre-built images referenced here are for the Xilinx development boards. These can be loaded on to SD Cards on the Xilinx development boards and you can boot Linux. The Pre-Built Releases Images page includes images  for Versal, Zynq UltraScale+ MPSoC, Zynq UltraScale+ RFSoC and Zynq-7000.

Embedded Design Tutorial (EDT)

The Embedded Design Tutorial provides an introduction to using the Xilinx® Vivado® Design Suite flow for using the Zynq UltraScale+ MPSoC device. The examples are targeted for the Xilinx
ZCU102 Rev 1.0 and Rev 1.1 evaluation boards.  The latest versions of the EDT use the Vitis™ Unified Software Platform. 

• Versal™ Adaptive Compute Acceleration Platform (UG1305)

Overview of the Embedded Software Stack on a Versal Premium

The following is an overview of the embedded software stack for a Versal Premium.

For system start-up, a Versal™ device must successfully initialize, boot, and configure from a supported boot source.

The Versal™ Adaptive SoC has four key system start-up phases, that are independent of the selected boot mode, from boot through life-cycle management:

• Phase 1: Pre-Boot (PMC hardware), Power-up and Reset
• Phase 2: Boot Setup (RCU BootROM), Initialization and boot header processing
• Phase 3: Load Platform (PPU PLM), Boot image processing and configuration
• Phase 4: Post-Boot (PPU PLM), Platform management and monitoring services

The following sections provide a simplified overview the four phases.

Phase 1 (Pre-Boot) and 2 (Boot Setup) are handled by the Platform Management Controller and RCU BootROM. This goes through the power up sequence and start executing the code in the RCU BootROM. This will select the boot device and validate the boot header. The control is then passed to the PMC Platform Processing Unit (PPU) which loads the Platform Loader and Manager (PLM) code. 

For full details please see the Versal Adaptive SoC Technical Reference Manual and Versal Adaptive SoC System Software Developers Guide. 

PLM - Platform Management and Boot

During Phase 3 (Load Platform) the PPU executes the PLM software from the PPU RAM. The PLM reads the programmable device image and the boot mode properties are setup. The PLM software configures the peripherals, programmable logic, and processing system then completes the initial device boot. The PLM loads the applications and data for the Arm Cortex-A72 and Cortex-R5F processors to various memories specified by the ELF file. These memories include on-board DDR and internal memories, such as OCM and TCM. 

For Phase 4 (Post-Boot) the PLM continues to run until the next POR or system reset, and is responsible for post-boot platform management tasks. Post-boot services include DFX reconfiguration, power management, subsystem restart, error management, and safety and security services.

ARM Trusted Firmware

ARM Trusted Firmware (ATF) provides a reference to secure software for ARMv8-A architecture and it provides implementations of various interface standards like PSCI(Power State Coordination Interface) and Secure monitor code for interfacing to Normal world software. Xilinx ARM trusted firmware is based on arm trusted firmware at https://github.com/ARM-software/arm-trusted-firmware.
Xilinx ARM Trusted Firmware tree will be released and available at https://github.com/Xilinx/arm-trusted-firmware.

For more information, go to the ATF page. 

U-Boot

U-Boot, short for Universal Boot Loader, is an open source, primary boot loader used in embedded devices to boot the device's operating system kernel that is frequently used in the Linux community. Xilinx uses U-Boot as a second stage boot loader in the Zynq Ultrascale+ devices. For more information about U-Boot visit their page at https://www.denx.de/wiki/U-Boot.

For more information about U-Boot on Versal Versal Premium devices,  go to the U-Boot page on this wiki.

Hypervisor (Optional)

On the Versal Premium devices, a hypervisor can be used to run more than one virtual machine. There are several hypervisors supported on the Versal Versal Premium devices. The list can be found on the  Embedded Software EcoSystem Xilinx.com. 

For more information regarding hypervisor uses on Versal Versal Premium, please see the Multi-OS Support (AMP & Hypervisor) page.

Linux

Since Linux is the primary OS that people start with on the Versal Premium devices,  there is more information on it at the Linux page. This includes the two different build tools used to create customer distributions. Xilinx's PetaLinux and Yocto, an open source project that is part of the Linux Foundation. The Linux page also describes how to build your own Linux from the source,  and links to information about the Linux drivers that Xilinx provides. 

Documentation/Resources

For full information on Versal Adaptive SoC technical details and software development please see the following two documents. 

• Versal Adaptive SoC Technical Reference Manual
• Versal Adaptive SoC System Software Developers Guide. 

The following link a list of Design Hubs (lists of related documentation) for development on Versal Adaptive SoC devices from Xilinx.com. 

• Versal Design Hub
• Vitis Acceleration
• Vitis Embedded Software Development
• PetaLinux Tools

The Xilinx Community Forums are places to get answers to questions or search for solutions to problems using Xilinx devices.

• https://forums.xilinx.com/

The Xilinx Developer site showcases projects using Xilinx products.

• https://developer.xilinx.com/

Tools

The Xilinx tools provide all required tool chains to compile and link applications for Xilinx supported platforms, create and configure hardware designs, and create bitstreams.

Installing the Xilinx Tools