This page gives an overview of the emaclite driver which is available as part of the Xilinx Vivado and SDK distribution.

The Xilinx® LogiCORE™ IP AXI Ethernet Lite Media Access Controller (MAC) core is designed to incorporate the applicable features
described in the IEEE Std. 802.3 Media Independent Interface (MII) specification. It communicates with the processor using the AXI4 or AXI4-Lite interface. The core supports a 10 Mb/s and 100 Mb/s (also known as Fast Ethernet) interface.

How to enable

Source Path for the driver
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/emaclite

Driver source code is organized into different folders. Below diagram shows the emaclite driver source organization

Emaclite
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-- doc - Provides the API and data structure details

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- examples - Reference application to show how to use the driver APIs and calling sequence
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- src- Driver source files

Features Supported

Controller Features

• Parameterized AXI4 slave interface based on the AXI4 or AXI4-Lite specification for transmit and receive data dual port memory access
• Media Independent Interface (MII) for connection to external 10/100 Mb/s PHY transceivers
• Independent internal 2K byte TX and RX dual port memory for holding data for one packet
• Optional dual buffer memories, 4K byte ping-pong, for TX and RX
• Receive and Transmit Interrupts support
• Optional Management Data Input/Output (MDIO) interface for PHY access
• Internal loopback support

Standalone Driver Supported Features

The Emaclite Standalone driver supports the below things.

• Supports Internal loopback mode
• Supports Ping pong buffers for both RX and TX
• Supports MII for connection to external 10/100 Mb/s PHY transceivers
• Supports accessing of PHY through MDIO interface...

Test cases

• Refer below pah for testing different examples for each feature of the IP.

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/emaclite/examples

xemaclite_selftest_example.c : This example performs the self-test on the emaclite device example does a write to Tx buffer and read back's to verify
similarly write to Rx buffer and read back's to verify.
xemaclite_internal_loopback_example.c : This is an interrupt example outlining the use of interrupts and callbacks in the transmission/reception of Ethernet frames using internal loopback
with an incrementing payload from 1 byte to 1500 bytes (excluding Ethernet Header and FCS).
xemaclite_intr_example.c : This is an interrupt example outlining the use of interrupts and callbacks in the transmission/reception of an Ethernet frame of 1000 bytes of payload.
xemaclite_polled_example.c : This is a polled mode example outlining the transmission/reception of an Ethernet frame of 1000 bytes of payload.
xemaclite_phy_loopback_example.c : This is an interrupt example outlining the use of interrupts and callbacks in the transmission/reception of Ethernet frames using MAC loop back in
the PHY device with an incrementing payload from 1 byte to 1500 bytes (excluding Ethernet Header and FCS).
This example can be run only when the MDIO interface is configured in the EmacLite core
xemaclite_ping_req_example.c : This is an EmacLite Ping request example in polled mode. This example will generate a ping request for the specified IP address.
xemaclite_ping_reply_example.c : This is an EmacLite ping reply example in polled mode. This example will generate a ping reply when it receives a ping request packet from the external world.

Known issues and Limitations

• All IP features are supported.

Change Log

2020.1

• None

2019.2

• None