Title: Versal NoC and DDR MC Design Process Guide  
Owner: Deanna DeMarco
Creator: Deanna DeMarco Aug 12, 2020
Last Changed by: William Cassells Apr 21, 2023
Tiny Link: (useful for email) https://xilinx-wiki.atlassian.net/wiki/x/FYB1LQ
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Apr 21, 2023 12:50 William Cassells View Changes
Apr 06, 2021 17:02 Deanna DeMarco View Changes
Mar 17, 2021 14:38 Deanna DeMarco View Changes
Feb 12, 2021 21:35 Deanna DeMarco View Changes
Feb 12, 2021 21:26 Deanna DeMarco  
Outgoing Links
External Links (39)
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    https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Bl…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Bl…
    https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Bl…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://github.com/Xilinx/Embedded-Design-Tutorials/tree/ma…
    https://github.com/Xilinx/XilinxCEDStore/tree/master/ced/Xi…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://github.com/Xilinx/XilinxCEDStore/tree/master/ced/Xi…
    https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Bl…
    https://www.xilinx.com/member/forms/download/design-license…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://www.xilinx.com/support/documentation/sw_manuals/xil…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Bl…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/documentation-navigation/des…
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://github.com/Xilinx/Vivado-Design-Tutorials/tree/mast…
    https://www.xilinx.com/support/documentation/user_guides/ug…
    https://www.xilinx.com/support/documentation/architecture-m…
    www.xilinx.com/member/versal_selectio_ibis_models.html
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/answers/76059.html
    https://github.com/Xilinx/XilinxCEDStore/tree/master/ced/Xi…
    https://www.xilinx.com/support/answers/75764.html
    www.xilinx.com/member/versal_si_pi_models.html
    https://www.xilinx.com/support/documentation/ip_documentati…
    https://www.xilinx.com/support/documentation/sw_manuals/xil…
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