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By default, the CLK104 add-on card is programmed with a DAC and ADC reference clock of 245.76MHz, a SYSREF clock of 7.68MHz, and a PL input clock of 122.88MHz. These frequencies are suitable for this example so no change is necessary. For reference, you can click on “Clock Settings” on the main screen to view the CLK104 output frequencies:
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For the internal clock distribution, we must select frequencies which respect the clock rules of MTS. The clock involved are: SYSREF, PL input clock, Tile input reference clock, Sampling frequency, AXI stream clocks. All clocks must be an integer multiple of SYSREF. In addition, the PL input clock must be an integer multiple of the AXI Stream clock. To respect these rules, the picture below details the clock distribution settings used in this example:
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