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This page gives an overview of axi-quad spi driver which is available as part of the Xilinx Vivado and Vitis distribution.
Source path for the driver:The AXI Quad Serial Peripheral Interface (SPI) core connects the AXI4 interface to those SPI slave devices that support the Standard, Dual, or Quad SPI protocol instruction set. This core provides a serial interface to SPI slave devices. The Dual/Quad SPI is an enhancement to the standard SPI protocol (described in the Motorola M68HC11 data sheet) and provides a simple method for data exchange between a master and a slave.
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Path in Vitis
Path in Github
<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/spi
Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/masterxilinx-v2020.1/XilinxProcessorIPLib/drivers/spi
Driver The driver source code is organized into different folders. Below diagram The table below shows the qspipsu nandpsu driver source organization.spi
Provides the API and data structure details
Driver .tcl and .mdd file
Example applications that show how to use the driver
Driver source files
The controller driver will be exclusive to GQSPI including API’s to be used for configuring the host controller and transmitting the data.
The following list of basic commands are supported by the Standalone driver:
Erase (Chip/Die/Bulk Erase)
EAR Register Access
Controller Features Supported:
The following features are supported in the QSPI Standalone driver.
For a full list of features supported by this IP, please refer to Axi Quad Spi.
DMA access (aligned address only)
Configurable bus width
Interrupts – will be chosen and enabled internally
Generic register read/write operations
3 byte and 4 byte addressing
Flash configurations illustrated in examples – Single
Known Issues and Limitations
The standalone driver supports Axi-spi and AXI Quad spi
Supported Flash vendors
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab
Links to Examples
Axi Quad Spi STM Flash Example
This examples does basic read and write test from the Stm flash device
Axi Quad Spi Numonyx Flash Example
This examples does basic read and write test from the Numonyx flash device
Axi Quad Spi Winbond Flash Example
This examples does basic read and write test from the Winbind flash device
Axi Quad Spi Atmel Flash Example
This examples does basic read and write test from the Atmel flash device
Example Application Usage
Axi Quad Spi STM FlashExample
This examples does basic read and write test from the Stm flash device.
XSPI Stm Flash Example Test
Axi Quad Spi Numonyx FlashExample
This examples does basic read and write test from the Numonyx flash device.
XSPI Numonyx Flash Quad Example Test
Successfully ran XSPI Numonyx Flash Quad Example Test
Axi Quad Spi Winbond FlashExample
This examples does basic read and write test from the Winbond flash device.
XSPI Windbond Flash Quad Example Test
Successfully ran XSPI Flash Quad Example Test
Axi Quad Spi Atmel FlashExample
This examples does basic read and write test from the Atmel flash device.
XSPI Atmel Flash Example Test
Example Design Architecture
Removed master inhibit dependency while writing to DTR.
Fixed compilation error in axi-spi interrupt example.
Updating license content to SPDX based licensing.
Updated the Makefile to support parallel make execution
Fill txfifo with data less than or equal to fifo depth