PetaLinux

• MicroBlaze

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Versal

• Corrected the .gitignore file in PetaLinux project as it has incorrect path as /components/plnx_workspace and /components/yocto

• Fixed almalinux-8.7 has not been validated with this version of build system warning

• Fixed mkfs.vfat utility issue by using it from dosfstools instead of busybox as busybox one provides minimal functionality.

PetaLinux

• Documentation

• Corrected the export Yocto environment variables section in UG1144

• The current PetaLinux supported fpgamanager_dtg_dfx template will create a .dtsi file only if the rm.xsa has any memory mapped PL IPs. The above note is missing while explaining the "fpgamanager_dtg_dfx" template so added note in UG1144.

• Updated documentation for MicroBlaze lite and MicroBlaze full properties.

• Removed  petalinux-config --defconfig option from UG1144 as this was removed from PetaLinux tool.

Linux Kernel and Drivers

• MicroBlaze

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Zynq UltraScale+ RFSoC

• Versal

• Fix for an issue with PL bitstream loading at Linux with DDR > 4GB.

• Fixed an issue with Zynq Cortex-A9 baremetal cache API Xil_DCacheInvalidateRange() where it is going into infinite loop when USE_AMP flag is set. 

• Fixed a BSP compilation issue for Zynq UltraScale+ Cortex-A53 BSP in 32-bit mode.

• Fixed a compiler optimization issue in baremetal xilfpga library.

• freertos10_xilinx: Save FPU context by default for ARM ports

• Fixed a compilation issue with baremetal tmr inject low level example.

• Fixed an issue FreeRTOS interrupt example on Zynq UltraScale+ when xiltimer is enabled.

• Fixed macb timestamp failure due to packet padding

• Fixed TSN EP and TEMAC probe path for error conditions

• Fixed ZynqMP NAND HW-ECC read issue

• Fixed Zynq QSPI dual-stack chip selection issue

• Fixed Zynq QSPI data protect issue with W25Q128FW and IS25WP064A flash part

• Fixed Zynq QSPI Issue with EAR support

• Fixed Versal OSPI Intermittent failure observed with DAC mode read/write

• Fixed Versal feedback clock check in QSPI BareMetal driver

Trusted Firmware-A(TF-A) (old name Arm Trusted Firmware (ATF))

• Zynq UltraScale+ MPSoC

• Versal

• zynqmp: fix sdei arm_validate_ns_entrypoint

U-Boot

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Versal

• spi: zynqmp_qpsi: Enabled invalidate_cache for ZynqMP and Versal

• xilinx: versal: Do not setup boot_targets if driver is not enabled

• clk: zynqmp: Added GEM RX and TSU clocks to return register

• clk: zynqmp: Added set_rate support for GEM RX and TSU clks

• clk: Do not return error when assigned-clocks is empty or missing

• env: Fix default environment saving issue

• zynqmp: config: Added proper dependencies for USB

• net: zynq_gem: Do not hardcode the MDC clock divisor

• spi: zynqmp_qspi: Change flush cache to invalidate cache

• mtd: spi-nor: Send write enable cmd before write to SR2

• usb: xhci: Work-around to fix the USB halted endpoint issues

Device-tree Generation (DTG)

• MicroBlaze

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Versal

• Corrected memory node generation for Versal in DTG if channel has the same prefix Ex: C*_DDR_CH2 C*_DDR_CH2_1

• DTG will create .dtsi file only if the rm.xsa has any memory mapped PL IPs so added  note  DTG wiki.

• Provided workaround for "Reference to non-existent node or label "phy1"" error in DTG wiki

• Corrected the video pipeline endpoint generation when TPG IP exists in pipeline.

• Fixed "axi_switch" references when it is connected between TPG and video frame  buffer.

• Provided a patch for 2022.2 DTG fails to build with MRMAC IP

• Generating the CPU nodes based on the design as it was failed for xczu2cg device as it has 2 CPU cores only

• Added missing properties Video PHY controller IP in DTG

• Added required properties for DP TX and DP RX IPs 

QEMU

• MicroBlaze

• Zynq UltraScale+ MPSoC

• Versal

ZynqMP:

• Corrected the DPDMA audio channel interrupt generation in the display port model

• Updatef SO-DIMM SPD data for correcting FSBL boot

• Corrected guest-error log in the eFuse model

Versal:

• Corrected the reset of EFUSE_PGM_ADDR and EFUSE_RD_ADDR registers in the eFUSE model

• Corrected 128 bit key loading in the AES model

• Corrected EMIO propagation to the SystemC wrapper

• Corrected guest-error log in the eFuse model

• (VEK280): Correct the flash model type to mt35xu02gbba

• (VHK158): Correct the HBM memory mapping 

MicroBlaze:

• AXI Ethernet (MicroBlaze KCU105): Corrected the link up reporting in the PHY model

• MDIO: Corrected 16 bit read and write accesses

PLM (Platform Loader and Manager)

• Versal

XilLoader:

• Fixed compilation error when PLM_SECURE_EXCLUDE enabled

• Deprecated copy to memory option

• Added specific error codes for KAT failure cases

• Doxygen fixes

• Placed ECDSA in reset and clear RAM when PLM_ECDSA_EXCLUDE is not defined

Secure Libraries

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Versal

XilSKey (Zynq7000, Zynq UltraScale+):

• Fixed MISRA-C violations

XilSecure:

• Security review fixes 

• Placed ECDSA in reset when PLM_ECDSA_EXCLUDE is not defined

• Fixed wrong Hash length input validation

• Fixed ECDSA boot failure on QEMU

• Removed TRNG driver from Xilsecure library in server mode only client is available

• Intimate user if data context is lost

• Error out disallowed CPU modes

• Handling endianness in ECDSA examples

• Initialize KeySizeInWords to avoid invalid value in case of glitch

• Fixed HMAC security review comments

• Check StatusTmp instead of Status

• Throw an error when AES/SHA is already in use

• Fixed doxygen warnings

• Fixed HIS COMF Violations

• Fixed NO_EFFECT coverity warning

• Fixed MISRA C violations

XilNVM:

• Security review fixes 

• Fixed GCC warnings

• Added versioning to the library

• Removed gaps in NVM API IDs

• Cleared AES keys on stack

• Added missing else check in XNvm_EfuseReadPpkHash 

• Convert Endianness of DME user key before eFuse write

XilPUF:

• Security review fixes 

• Fixed HIS_COMF violation

• Store PUF AUX after shifting 

• Fixed compilation issue for xilpuf_client_example 

• Fixed coverity warning

• Doxygen warning fixes 

• Fixed PUF auxiliary convergence error 

• Fixed bugs in xilpuf examples 

• Fixed passing efuse cache value

PMUFW (Platform Management Unit Firmware)

• Zynq UltraScale+ MPSoC

• Zynq UltraScale+ RFSoC

• None

Zynq UltraScale+ FSBL

• Zynq UltraScale+ MPSoC

• Zynq UltraScale+ RFSoC

• Fixed prints mixup issue when only UART used in system

XilSEM

• Versal

• None

Yocto

• MicroBlaze

• Zynq 7000

• Zynq UltraScale+ MPSoC

• Zynq UltraScale+ RFSoC

• Versal

• Fixed gvim binaries do not generate when you compile vim recipe with X11 distro features.

• Fixed PACKAGECONFIG (qemu-usermode) warnings which are observed in 2023.1 SDT builds.

• Fixed missing libopencv_ts libraries in sysroot for SDK development.

• Fixed bitstream-extraction warnings which are observed in 2023.1 SDT builds.

• Fixed ROS control packagegroup as it was setup incorrectly.

• Included ROS base packagegroup to demo and control packagegroup.

• Fixed below meta-ros package build issues.

  • hardware-interface

  • transmission-interface

  • controller-interface

  • controller-manager

  • controller-manager-msgs

  • contol-msgs

  • turtlesim

  • xarco

• Fixed missing ros_setup.sh when packagegroup-petalinux-ros-control is included in IMAGE_INSTALL.

• Fixed missing PRE_BOOTENV in boot.cmd.sd.zynqmp script.

• Fixed WKS_FILE_DEPENDS doesn't take into account with IMAGE_BOOT_FILES installed names.

• In xilinx-bootbin use '-arch versal' instead of '-arch versalnet' for versa-net machine files.

• Fixed "xmuilt version" and "qemu checksum"  warnings for kv260 starter kit builds.

• Removed dependency on embeddedsw components in kria wic image.

• Removed unused IMAGE_FSTYPES from kria build.

• Removed unused packages in kria-image-full-cmdline image recipe.

• Fixed kria-qpsi u-boot do_compile build failures.

• Fixed packagegroup-petalinux-self-hosted dnf install issue for Zynq 7000.

• Removed baremetal and freertos dtb files from SDT build fitimage.

• Fixed MicroBlaze build issue with systemd enabled.

• Fixed YAML_DT_BOARD_FLAGS for kc705 machine configuration file.

• Fixed KRIA QSPI image recipe builds initramfs unnecessarily causing significantly increase in build time.

• Removed BOARD MACHINEOVERRIDES in machine conf and recipes files.

• Fixed recipes are rebuilding when not necessary.

• Fixed kconfig-frontends warning about /usr/include path.

• Obsoleted run-postinsts workaround fix from meta-petalinux layer as this is fixed in upstream.

AIE Driver

• Versal

• Replaced the zeroization calls with zynqpm API's in kernel

• Fixed Gated Tile in AIEML Linux flow

• Fixed discrepancy in Sysfs BD metadata for CORE tile of AIE2

• Fixed runtime mode trace issue due to incomplete information in aie_event_runtime_config.json

• Added an API to configure edge detection events

• Changed _AIEARCH_ name to _AIE_ARCH_

• Fixed compilation warning