...
Video Encode/Decode capability using the VCU hard block in the PL PL.
H.264/H.265 encoding
Encoder/decoder parameter configuration using OMX interface.
Demonstrate the multi-stream capability of VCU at 4k 60 Hz throughput.
Audio Codec
Opus 2 channel 48KHz
...
Design Module # | Project Name | TRD Pre-built images | Hardware design | Description |
|---|---|---|---|---|
1 | vcu_multistream_nv12 | zcu106_trd | Multi-stream design supporting HDMI-Rx, TPG, MIPI, HDMI-Tx, DP along with showcasing the capabilities of the VCU | |
2 | PL DDR HLG SDI Audio Video Capture and Display | This Design Module is merged with Design Module #10. All functionality of this Design Module is now available in Design Module #13. | ||
3 | vcu_audio | zcu106_audio | Design supporting I2S and HDMI Audio with video capture of HDMI-Rx/MIPI-Rx and showcasing the capabilities of the VCU | |
4 | 10G HDMI Video Capture and Display | This Design Module is discontinued in the 2021.2 VCU TRD release. | ||
5 | PCIe Encode, Decode and Transcode | This Design Module is discontinued in the 2022.1 VCU TRD release. | ||
6 | vcu_plddrv1_hdr10_hdmi | zcu106_HDR10_DCI4K | VCU based HDMI design to showcase encoding with the PS DDR and decoding with the PL DDR. It supports the reception and insertion of HDR10 static metadata for HDMI and also the DCI4K Feature. HDR10 PLDDR_V1 corresponds to the old PLDDR part : MT40A256M16GE-075E | |
7 | Xilinx Low Latency PS DDR NV12 HDMI Audio Video Capture and Display | vcu_llp2_hdmi_nv12 | zcu106_llp2_audio_nv12 | VCU based HDMI audio video design to showcase ultra low latency support using the Sync IP, encoding and decoding with PS DDR for NV12 format |
8 | Xilinx Low latency PL DDR NV16 HDMI Video Capture and Display | These two design modules are now merged as a single design module - #12 - Xilinx Low Latency PL DDR HDMI Video Capture and Display. | ||
9 | Xilinx Low latency PL DDR NV20 HDMI Video Capture and Display | |||
10 | Xilinx Low Latency PL DDR XV20 SDI Video Capture and Display | This Design Module is merged with Design Module #2. All functionality of this Design Module is now available in Design Module #13. | ||
11 | Quad Sensor MIPI CSI Video Capture and HDMI Display | This Design Module is been discontinued since the 2021.1 VCU TRD release. | ||
12 | vcu_llp2_plddr_hdmi | zcu106_llp2_xv20_nv16 | VCU based HDMI design to showcase ultra low latency support using Sync IP, encoding with PS DDR and decoding with PL DDR for NV16 and XV20 format | |
13 | Xilinx Low Latency PL DDR HLG SDI Audio Video Capture and Display | vcu_llp2_hlg_sdi | zcu106_llp2_hlg_sdi | Design showcasing HLG/Non-HLG Video + 2/8 channels Audio Capture and Display through SDI interface along with the capabilities of the VCU with PL DDR supporting 4:2:2 10-bit XV20 format encoding from the PS DDR and decoding from PL DDR. It also showcases ultra low latency support using Sync IP, encoding with PS DDR and decoding with PL DDR for XV20 format. |
14 | vcu_yuv444 | zcu106_yuv444 | VCU based HDMI/DP video design to showcase YUV444 8-bit and 10-bit functionality. | |
...
USB pen drive formatted with the FAT32 file system and hub.
SATA drive formatted with the FAT32 file system, external power supply, and data cable.
3.2 Software Tools
Required:
...
Download the TRD 2023.1 release package from here. [TO DO: To be updated by April 26, 2023]
This RDF package contains the zcu106_vcu_trd_sources_and_licenses.tar.gz file, which contains the sources and licensing information for all PetaLinux recipes used to generated VCU TRD images.
...
Xilinx Answers Database to locate answers related to known issues.
Xilinx Support Community to ask questions or discuss technical details and issues. Please make sure to browse the existing discussions first before starting a new thread. If you do ask a question, make sure it is in the sub-forum that best describes your issue or question, for example Embedded Linux for any Linux related questions. Please include "ZCU106 VCU TRD" and the release version in the title along with a brief summary of the issue.
...