This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP AXI USB soft IP.
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Introduction
The AXI USB device IP is a USB device controller IP. It has no support for OTG mode. This IP can be instantiated on FPGA or Zynq or ZynqMP PL. This page describes the usage of AXI USB device IP standalone driver.
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/
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Mass storage profile can be tested by compiling xusb_storage_polled_mode.c,xusb_cp9.c,xusb_cp9.h,xusb_storage.h,xusb_types.h and
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usb/src
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Below is the testing procedure of AXI USB standalone example which operates as a mass storage gadget
Download and run the generated USB 2.0 example ELF
Connect board setup to standard host(Windows/Linux)machine USB 2.0 port.
Expected Output
You will get a pop-up window on a Windows machine for formatting the size 256MB. After the format completes, you can copy the file to the USB device.
Example Design Architecture
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The below performance results are observed using CrystalDiskMark tool on windows
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Change Log
2024.2
2024.1
None
2023.2
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2023.2/doc/ChangeLog#L315
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