2017.4 Linux and DTG Release Notes
Linux Changes
Module Name | Driver Location | Changes | Link |
Linux kernel | Linux kernel source |
| https://kernelnewbies.org/Linux_4.9 https://github.com/Xilinx/linux-xlnx/tree/xlnx_rebase_v4.9 |
Zynq/Zynq Ultrascale+ MPSOC/Microblaze AXI DMA/CDMA/VDMA | drivers/dma/xilinx/xilinx_dma.c | AXI CDMA
| http://www.wiki.xilinx.com/DMA+Drivers+-+Soft+IPs |
Linux Bug Fixes
Module Name | Driver Location | Bug Fixes | Link |
Zynq/Zynq Ultrascale+ MPSOC/Microblaze AXI DMA/CDMA/VDMA | drivers/dma/xilinx/xilinx_dma.c | AXI CDMA
| http://www.wiki.xilinx.com/DMA+Drivers+-+Soft+IPs |
Axi Traffic generator | drivers/misc/xilinx_trafgen.c |
| http://www.wiki.xilinx.com/Linux+Trafficgen+Driver |
UartPs | drivers/tty/serial/xilinx_uartps.c |
| http://www.wiki.xilinx.com/PS+UART |
Zynq Ultrascale+ MPSOC QSPI | drivers/spi/spi-zynqmp-gqspi.c |
| http://www.wiki.xilinx.com/Linux+ZynqMP+GQSPI+Driver |
DTG Feature Changes
Module Name | Feature Changes | Link |
Generic | Support for 2017.4 board, zynq and zynqmp device tree files. | https://github.com/Xilinx/device-tree-xlnx/commit/8179e3c9e79482900c65e114d987e29e3a6b3417 |
DDR3 | Added ddr3 support in the dtg | https://github.com/Xilinx/device-tree-xlnx/commit/df4f8e2e5094458e74781700fe3185af7a076472 |
DTG Bug Fixes
Module Name | Bug Fixes | Link |
common | Fix the logic if connected interrupt controller is Null | https://github.com/Xilinx/device-tree-xlnx/commit/3c7407f6f802461cd5ba8545e82c64fbd177452b |
Answer Records (ARs)
Module Name | AR Title | AR Link |
Zynq, ZynqMP Ethernet, macb | Common MDIO bus support for Multi MAC-Multi PHY configuration | https://www.xilinx.com/support/answers/69132.html |