Table of Contents
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Introduction
This page describes the Xilinx GMII2RGMII converter IP which can be found at /drivers/net/phy/xilinx_gmii2rgmii.c
This converter can be used with any MAC device, either axi ethernet or Zynq/Zynq Ultrascale+ MPSoC GEM.
Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.
XILINX_GMII2RGMII
Refer to http://www.wiki.xilinx.com/Macb+Driver#Test Procedure
This converter can be used with any MAC device, either axi ethernet or Zynq/Zynq Ultrascale+ MPSoC GEM.
Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.
HW IP features
- GMII2RGMII conversion
Features supported in driver
- GMII2RGMII conversion
Missing Features, Known Issues and Limitations
- None
Kernel Configuration
This following config option is required to enable this converter driver:XILINX_GMII2RGMII
Devicetree
| Code Block | ||
|---|---|---|
| ||
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy: ethernet-phy@0 {
......
};
gmiitorgmii: gmiitorgmii@8 {
compatible = "xlnx,gmii-to-rgmii-1.0";
reg = <8>;
phy-handle = <&phy>;
};
}; |
Test Procedure
This phy can be tested with any MAC using general ethernet test procedures like ping, iperf/netperf.Refer to http://www.wiki.xilinx.com/Macb+Driver#Test Procedure
Mainline status
This driver is currently in sync with mainline except for the following diff:- Minor warning fix for mdiobus_return (1 line)
Change Log
2020.2
Summary
Minor warning fix
Commits:
https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2020.2/drivers/net/phy/xilinx_gmii2rgmii.c
2020.1
Summary
Minor bugfix to sync priv field usage with mainline driver
Commits:
https://github.com/Xilinx/linux-xlnx/commits/xilinx-v2020.1/drivers/net/phy/xilinx_gmii2rgmii.c
2019.2
Summary
- Bug fixes
Commits:
b145197 net: gmii2rgmii: do not attach if phy has a priv field
a233487 net: gmii2rgmii: Switch priv field in mdio device structure
2019.1
Summary
- Bug fixes
Commits:
...