This page gives an overview of the bare-metal driver support for the Xilinx® LogiCORE™ IP Zynq USB soft IP.
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Example | Depandent source files (https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/usbps/examples) |
|---|---|
xusbps_intr_example.c | xusbps_class_storage.c,xusbps_class_storage.h,xusbps_ch9_storage.c,xusbps_ch9_storage.h,xusbps_ch9.c,xusbps_ch9.h |
xusbps_audio_example.c | xusbps_ch9_audio.c,xusbps_ch9_audio.h,xusbps_ch9.c,xusbps_ch9.h,xusbps_class_audio.c,xusbps_class_audio.h,xusbps_audiodata.h |
Example Application Usage
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Mass storage profile can be tested by compiling xusbps_class_storage.c,xusbps_class_storage.h,xusbps_ch9_storage.c,xusbps_ch9_storage.h,xusbps_ch9.c,xusbps_ch9.h and xusbps_intr_example.c
files together
Testing procedure
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Device Log:
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Audio UAC1.0 output at Host end
Detection of HighSpeed Microphone – UAC1.0 on standard host Linux machine USB 2.0 port.
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The below performance results are observed using CrystalDiskMark tool on windows
USB 2.0:
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Change Log
2024.2
embeddedsw/doc/ChangeLog at xlnx_rel_v2024.2 · Xilinx/embeddedsw · GitHub
2024.1
https://github.com/Xilinx/embeddedsw/blob/xlnx_rel_v2024.1/doc/ChangeLog#L730
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