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This page gives an overview of SCU Watchdog BareMetal driver

Table of Contents

Table of Contents
excludeTable of Contents

Introduction

The watchdog timer can be used to prevent system lockup; for example, when software becomes trapped in a deadlock.
In normal operation, the user restarts the watchdog at regular intervals before the timer counts down to zero.
In cases where the timer does reach zero and the watchdog is enabled, one or a combination of the following signals is
generated: a system reset, an interrupt, or an external signal. The watchdog timeout period and the duration of any output signals are programmable.
For more information, please refer Chapter 14: Timers and clocks in Zynqmp Trmwhich includes links to the official documentation and resource utilization.

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Driver NamePath in VitisPath in GitHub
scuwdt<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/scuwdthttps://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scuwdt


Info

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is:  https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/scuwdt


The driver source code is organized into different folders. The table below shows the scuwdt driver source organization.

DirectoryDescription
srcDriver source files, make and cmakelists file
examplesExample applications that show how to use the driver features
docProvides the API and data structure details
dataDriver .tcl , .mdd and .yaml files

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Polled mode example

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scuwdt/examples/xscuwdt_polled_example.c

This test contains a design example using the Xilinx SCU Private Watchdog Timer driver (XScuWdt) and hardware device in watchdog mode. It
illustrates how to initialize the watchdog device and restart it periodially in polling mode to avoid the assertion of the WDRESETREQ pin.

Output
Code Block
themeMidnight
SCU WDT Polled Mode Example Test
Successfully ran SCU WDT Polled Mode Example Test

Interrupt mode example

https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/scuwdt/examples/xscuwdt_intr_example.c

This file contains a design example using the Xilinx SCU Private Watchdog Timer driver (XScuWdt) and hardware in Timer mode using interrupts. It illustrates
how to use Watchdog device in the timer mode.

Output
Code Block
themeMidnight
SCU WDT Interrupt Example Test
Successfully ran SCU WDT Interrupt Example Test

Example Design Architecture

  • NA

Changelog

2024.1

  • None

2023.2

2023.1

  • None

2022.2

  • None

2022.1

  • None

2021.2

  • None

2021.1

2020.2

2020.1

2019.2

  • None

2019.1

  • None

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