Introduction
The Xilinx® LogiCORE™ IP JESD204 core implements a JESD2014B interface supporting line rates from 1Gbps to 12.5Gbps.
JESD204 can be configured as a transmitter or a reciever.
HW IP Features
- Supports up to 8 lanes per core and up to 32 lanes using multiple cores
- Supports Initial Lane Alignment
- Supports scrambling
- Supports 1–256 octets per frame
- Supports 1–32 frames per multiframe
- Supports Subclass 0, 1, and 2
Known Issues and Limitations
Kernel Configuration Options for Driver
To enable GPIO in the kernel, the following configuration options need to be enabled: Code Block |
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CONFIG_XILINX_JESD204B=y
CONFIG_XILINX_JESD204B_PHY=y |
Devicetree
Code Block |
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jesd_Tx_axi_0: jesd_Tx@44a20000 {
compatible = "xlnx,jesd204-5.1";
reg = <0x44a20000 0x10000>;
xlnx,frames-per-multiframe = <30>;
xlnx,bytes-per-frame = <2>;
xlnx,subclass = <1>;
xlnx,lanes = <0x2>;
xlnx,node-is-transmit;
} ;
jesd_Rx_axi_0: jesd_Rx@44a00000 {
compatible = "xlnx,jesd204-5.1";
reg = <0x44a00000 0x10000>;
xlnx,frames-per-multiframe = <30>;
xlnx,bytes-per-frame = <2>;
xlnx,subclass = <1>;
xlnx,lanes = <0x2>;
} ; |
Test procedure on Microblaze
Code Block |
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# cat /sys/devices/axi@0/44a00000.jesd_Rx/lane0_info
DID: 0, BID: 0, LID: 0, L: 1, SCR: 0, F: 1
K: 1, M: 1, N: 1, CS: 0, S: 1, N': 1, HD: 0
FCHK: 0x0, CF: 0
ADJCNT: 0, PHYADJ: 0, ADJDIR: 0, JESDV: 0, SUBCLASS: 0
MFCNT : 0x0
ILACNT: 0x0
ERRCNT: 0x0
BUFCNT: 0x0
LECNT: 0x0
FC: 100000000
#
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/lane0_syncstat
NOT_IN_TAB: 0, DISPARITY: 2, UNEXPECTED_K: 0
/ #
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/lane1_syncstat
NOT_IN_TAB: 0, DISPARITY: 0, UNEXPECTED_K: 0
/ #
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/reg_access
0x1D
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/sync_status
0x10001
/ #
**UIO:**
/ # cat /sys/class/uio/uio0/maps/map0/
/sys/class/uio/uio0/maps/map0/addr /sys/class/uio/uio0/maps/map0/offset
/sys/class/uio/uio0/maps/map0/name /sys/class/uio/uio0/maps/map0/size
/ # cat /sys/class/uio/uio0/maps/map0/*
0x40040000
/axi@0/Reset@40040000
0x0
0x00001000
/ #
Testing from sysfs:
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/sync_status
0x10000
/ #
/ # devmem 0x40040000 32 1
/ # cat /sys/devices/platform/axi@0/44a00000.jesd_Rx/sync_status
0x10001
/ #
/ #
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Expected Output
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40400000.serial: ttyS0 at MMIO 0x40401000 (irq = 6, base_baud = 6250000) is a 16550A
console [ttyS0] enabled
brd: module loaded
xilinx_jesd204b 44a20000.jesd_Tx: AXI-JESD204B 6.0 Rev 1, at 0x44A20000mapped to 0xf00c0000,
xilinx_jesd204b 44a00000.jesd_Rx: AXI-JESD204B 6.0 Rev 1, at 0x44A00000mapped to 0xf00e0000,
i2c /dev entries driver
TCP: cubic registered
NET: Registered protocol family 17 |
Mainline Status
The driver is not mainlined.
Change Log
- 2017.3
- 2017.4
- 2018.1
- 2018.2
- 2018.3
- 2019.1
- 2019.2
- 2020.1
- 2020.2
- Summary
- misc: jesd204b: Remove unused function
- Commit
https://www.xilinx.com/support/documentation/ip_documentation/jesd204/v7_2/pg066-jesd204.pdf