Table of Contents
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Design Overview
This module shows how to add several PL peripherals:
- Test Pattern Generator (TPG)
- HDMI Rx
- MIPI CSI-2 Rx
- HDMI Tx
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Design Components
This module requires the following components:
- zcu102_base_trd (Vivado)
- petalinux_bsp
- zynqmp_fsbl
- pmufw
- bl31
- u-boot
- kernel
- device tree (zcu102-base-dm6.dtsi)
- rootfs
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Build Flow Tutorials
Vivado Hardware Design
This tutorial shows how to build the Base TRD Vivado design that implements the TPG capture pipeline, HDMI Rx capture pipeline including VPSS scaler & frame-buffer read configured for 2ppc and HDMI Tx display pipeline including video-mixer configured for 2ppc.
Start Vivado
Code Block language bash theme Midnight % mkdir -p $TRD_HOME/vivado % cd $TRD_HOME/vivado % vivado
From the Vivado tcl console run
Code Block language bash theme Midnight % open_dsa ../zcu102_base_trd/hw/zcu102_base_trd.dsa
- Open the block design and generate a bitstream. Confirm with OK if prompted to launch runs, to save the block design, and to launch synthesis/implementation. This step may take several minutes to complete
Export the hdf file and include the bitstream for handoff to PetaLinux. Click File → Export → Export Hardware. Make sure the Include bitstream option is checked. Confirm with OK if prompted to save the block design.
PetaLinux BSP
This tutorial shows how to build the Linux image and boot image using the PetaLinux build tool. This step assumes you have created the PetaLinux project in DM1 previously.
Select the device-tree matching design module 6.
Code Block language bash theme Midnight % cd $TRD_HOME/petalinux/bsp/project-spec/meta-user/recipes-bsp/device-tree/files % cp zcu102-base-dm6.dtsi system-user.dtsi
Import the hdf file generated by Vivado in the previous step and build all Linux image components. If you have run petalinux-build in a previous module, the build step will be incremental.
Code Block language bash theme Midnight % cd $TRD_HOME/petalinux/bsp % petalinux-config --get-hw-description=$TRD_HOME/vivado/zcu102_base_trd/zcu102_base_trd.sdk/ --silentconfig % petalinux-build
Create a boot image.
Code Block language bash theme Midnight % cd $TRD_HOME/petalinux/bsp/images/linux % petalinux-package --boot --bif=../../project-spec/boot/dm6.bif --force
Copy the generated boot image and Linux image to the dm6 SD card directory.
Code Block language bash theme Midnight % mkdir -p $TRD_HOME/sd_card/dm6 % cp BOOT.BIN image.ub $TRD_HOME/sd_card/dm6
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Run Flow Tutorial
- See here for board setup instructions.
- Copy all the files from the
$TRD_HOME/sd_card/dm6
SD card directory to a FAT formatted SD card. - Power on the board to boot the images; make sure INIT_B, done and all power rail LEDs are lit green.
- After ~30 seconds, the display will turn on and the application will start automatically, targeting the max supported resolution of the monitor (one of 3840x2160 or 1920x1080 or 1280x720). The application will detect whether DP Tx or HDMI Tx is connected and output on the corresponding display device.
To re-start the TRD application with the max supported resolution, run
Code Block language bash theme Midnight % run_video.sh
To re-start the TRD application with a specific supported resolution use the -r switch e.g. for 1920x1080, run
Code Block language bash theme Midnight % run_video.sh -r 1920x1080
- The user can now control the application from the GUI's control bar (bottom) displayed on the monitor.
- The user can select from the following video source options:
- TPG (SW): virtual video device that emulates a USB webcam purely in software
- USB: USB Webcam using the universal video class (UVC) driver
- File: Raw video file supplied by user in YUYV format
- CSI: MIPI camera (LI-IMX274MIPI-FMC module)
- TPG (PL): Test Pattern Generator implemented in the PL
- HDMI: HDMI input implemented in the PL
- The user can select from the following accelerator options:
- Passthrough (no accelerator)
- The video info panel (top left) shows essential settings/statistics.
- The CPU utilization graph (top right) shows CPU load for each of the four A53 cores.
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Next Steps
- Continue with Design Module 7
- Return to the Design Tutorials Overview.