Zynq UltraScale MPSoC VCU TRD 2019.1
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1 Revision History
This wiki page complements the 2019.1 a version of the MPSoC VCU TRD.
Change Log:
- Update all projects, IPs, and tools versions to 2019.1
- I2S capture and renderer Audio integrated into TRD
- Memory-based SCD support – Maximum 8 streams (7 HDMI, 1 MIPI)
- File-based PCIe transcode use case supported - host → device → host
- HDMI video capture and display with PL DDR
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This is the main page of VCU TRD wiki, which has links to redirect wiki pages corresponding to individual design modules. It also explains the complete feature list and the supported resources of all the designs. TRD package weblink is provided for the user to download. This page also gives information on required software tools, IP licenses.
The Zynq® UltraScale+™ MPSoC Video Codec Unit (VCU) Targeted Reference Design (TRD) consists of an embedded video encoding/decoding application that runs on the Processing System (PS). The overall functionality of the TRD is partitioned between the Processing System (PS), Video Codec Unit, and Programmable Logic (PL) for optimal performance.
The primary goal of this TRD is to demonstrate the capabilities of the VCU core which is an integrated hard block present in Zynq UltraScale+ MPSoC EV devices. The TRD serves as a platform for the user to tune the performance parameters of VCU and arrives at an optimal configuration for encoder and decoder blocks for their specific use case. The TRD uses Vivado IP Integrator (IPI) flow for building the hardware design and Xilinx Yocto PetaLinux flow for software design. It uses Xilinx IPs and software drivers to demonstrate the capabilities of different components
The TRD supports the following video interfaces:
Sources (up-to 4K-60FPS):
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Serial Communication:
- PCIe(Peripheral Component Interconnect Express)
Video format:
- NV12
- NV16
- XV15
- XV20
The below figure shows the TRD block diagram. It consists of all the Design Modules. The components of each design module are highlighted in unique colors in the diagram. The remaining blocks are common to all design modules as shown.
The VCU TRD 2019.1 the version consists of eleven design-modules as described below. Individual links below will redirect to the corresponding wiki pages and build and run the flow of individual designs modules.
Design Module # | Project Name | TRD Pre-built images (rdf0428-zcu106-vcu-trd-2019-1/images) | Description |
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| 1 | VCU TRD | vcu_trd | Multi-stream design supporting HDMI-Rx, TPG, MIPI, HDMI-Tx, DP along with showcasing capabilities of VCU. |
| 2 | SDI Capture and Display with Audio | vcu_sdirxtx | Design showcasing Audio Video Capture and Display through SDI interface along with the capabilities of VCU |
| 3 | Multistream Audio | vcu_audio | Design supporting I2S or HDMI Audio with video capture of HDMI-Rx/MIPI Rx and showcasing capabilities of VCU |
| 4 | 10G Ethernet Video streaming | vcu_10g | Design showcasing Video stream over 10G Ethernet along with the capabilities of VCU |
| 5 | HDMI Capture and Display with SDSoC accelerator | vcu_sdx | Design showcasing PL based accelerator IP through SDSoC tool as post-processing plug-in for VCU |
| 6 | PCIe transcode | vcu_pcie | Design to showcase file transfer from HOST(x86) machine over PCIe interface and transcode it on ZCU106 Board having VCU connected as PCIe endpoint and write back the transcoded data to the HOST machine. |
7 | vcu_hdmirx | Design showcasing Video Capture through HDMI interface along with the capabilities of VCU | |
| 8 | HDMI Display | vcu_hdmitx | Design showcasing Video Display through HDMI interface along with the capabilities of VCU |
9 | vcu_sdirx | Design showcasing Video Capture only through SDI interface along with the capabilities of VCU | |
10 | vcu_sditx | VCU based video design showcasing SDI transmit capabilities along with the capabilities of the VCU | |
| 11 | HDMI Capture and Display with PL DDR | vcu_plddr_hdmi | This is the new design approach proposed to use PL DDR for decoding and PS DDR for encoding so that DDR bandwidth would be enough to support high bandwidth VCU applications requiring simultaneous encoder and decoder operations and transcoding at 4k@60fps. |
VCU TRD User guide has more details about the list of features, software architecture, and hardware architecture of individual designs. Here is the link for the user guide :
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