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- STIG Memory Bank (no support in the driver)
- Indirect Non-DMA read and write support.
Supported Flash parts
- Micron (512Mb, 1Gb and 2Gb)
Test cases
- xospipsv_flash_polled_example - This example writes to flash in STIG mode and reads back the data in DMA mode, it runs in polled mode.
- xospipsv_flash_intr_example - This example writes to flash in STIG mode and reads back the data in DMA mode, it runs in interrupt mode.
- xospipsv_flash_non_blocking_read_example - This example writes to flash in STIG mode and reads back the data in DMA mode(using non-blocking API's), it runs in polled mode.
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OSPIPSV Flash Polled Example Test FlashID = 0x2C 0x5B 0x1A 0x10 0x41 0x0 0x96 0x78 0x0 EraseCmd 0xDC WriteCmd: 0x12 ReadCmd 0xCC Successfully ran OSPIPSV Flash Polled Ex |
OSPIPSV Flash Interrupt Example Test Execuing on the a72 FlashID = 0x2C 0x5B 0x1A 0x10 0x41 0x0 0x96 0x78 0x0 EraseCmd 0xDC WriteCmd: 0x12 ReadCmd 0xCC Successfully ran OSPIPSV Flash Interrupt Example |
OSPIPSV Flash Polled non-blocking read Example Test FlashID = 0x2C 0x5B 0x1A 0x10 0x41 0x0 0x96 0x78 0x0 EraseCmd 0xDC WriteCmd: 0x12 ReadCmd 0xCC Successfully ran OSPIPSV Flash |
Performance Details
At frequency 133.33 MHz
DDR mode:
Read Speed: 253371 KBPS
SDR-PHY mode:
Read Speed: 128849 KBPS
At frequency 33.33 MHz
SDR NON-PHY mode:
Read Speed: 32625 KBPS
Change Log
2020.2
- 061d258 - Added support for 64-bit address read from 32-bit processor.
- be92f5a - Added support for ISSI and GIGADEVICE parts.
- 4d606c1, 82955b5 - Added support for stacked mode.
2020.1
- 89db8d5 - Added support for RX periodic tuning (provided user API).
- 294fe39 - Added non-blocking DMA transfer support (provided user API's).
- e2ed45a - Added support for DLL Master mode.
2019.2
- 2f1ecdc - Added RX tuning for SDR-PHY and DDR-PHY modes.
- 9abaa2f - Added support for EL1_NS.
- bb7fa4a - Added support for flash device reset.
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