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Table of Contents


The Zynq® UltraScale+™ MPSoC real time clock (RTC) provides the real time even when the device is powered off. When the device is off, the RTC is switched to the battery power supply. A battery-backed RAM (BBRAM) is provided for when device is operating in the battery mode. However, the RTC controller and user interface are only operational when the low-power domain supply is ON. The RTC has an alarm function that generates an alarm at a specific time and date with a 136-year range. The RTC also has periodic software calibration and logic to correct the static fractional inaccuracy of an oscillator.


Real-Time Clock (RTC) provides the following features:
  • Maintains the real time, even when the device is off (powered-off).
  • Has the capability to generate an alarm at a specific time and date.
  • Includes the means for periodic software calibration of the RTC.
  • Includes logic to correct the static fractional inaccuracy of the oscillator.
  • Keeps track of time within a window of more than 136 years (232 seconds) from a reference point.
  • Implemented as three counters.
  • 16-bit tick counter creates one second based on the crystal clock.
  • 4-bit fraction counter keeps track of the static crystal errors in one second that is less than one oscillator tick.
  • 32-bit seconds counter holds the real time and allows on-demand reload whenever current time of the RTC is set.
  • Allows wake-up at a specific second within the 136 years (32-bit alarm)

Missing features, Known Issues, limitations

  • None

Overview of Linux RTC Framework
This weblink is path to rtc.txt file in linux documentation which clearly expalins about the legacy and new framework for RTC on SoC.

Kernel Configuration:

Kconfig options:
Code Block
        tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
        depends on OF
          If you say yes here you get support for the RTC controller found on
          Xilinx Zynq Ultrascale+ MPSoC.
Menuconfig snapshots -
Code Block
[*] EDAC (Error Detection And Correction) reporting  --->
[*] Real Time Clock  --->
[*] DMA Engine support  --->
[*] Auxiliary Display support  --->

Code Block
--- Real Time Clock
[*]   Set system time from RTC on startup and resume
[*]   Set the RTC time based on NTP synchronization (NEW)
(rtc0)  RTC used to set the system time
[ ]   RTC debug support
    *** RTC interfaces ***
[*]   /sys/class/rtc/rtcN (sysfs)
[*]   /proc/driver/rtc (procfs for rtcN)
[*]   /dev/rtcN (character devices)
[ ]     RTC UIE emulation on dev interface
< >   Test driver/device
       *** Platform RTC drivers ***
        < >   ST M48T86/Dallas DS12887
        < >   ST M48T35
        < >   ST M48T59/M48T08/M48T02
        < >   Oki MSM6242 (NEW)
        < >   TI BQ4802
        < >   Ricoh RP5C01 (NEW)
        < >   EM Microelectronic V3020
        <*>   Xilinx Zynq Ultrascale+ MPSoC RTC (NEW)
       *** on-CPU RTC drivers ***

Testing Procedure

Code Block
1.Get current date and time using "date" command
2.Set date and time using following commanddate -s "2015-09-08 13:36:00"
3. Verify the same using date command again.

Mainline status

This driver is currently in sync with the mainline kernel except for the following:

   rtc: zynqmp: Add calibration set and get support 


  • 2020.2

    • summary:
      • rtc: zynqmp: Clear alarm interrupt status before interrupt enable
    • Commits
  • 2020.1

    • summary:
      • rtc: rtc-zynqmp: Add calibration set and get support
    • Commits
      • a4704c54 :Add calibration set and get support
  • 2019.2

    • Summary
      • rtc: rtc-zynqmp: Clear alarm interrupt status before intr enable
    • Commits
      • 771fb636 rtc: rtc-zynqmp: Clear alarm interrupt status before intr enable
  • 2019.1

    • None
  • 2018.3

    • None
  • 2018.2

    • None
  • 2018.1

    • None
  • 2017.4

    • None
  • 2017.3

    • None
  • 2017.2

    • None
  • 2017.1

    • None
  • 2016.3

    • None

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