This page provides all the information related to Design Module 4 - VCU TRD 10G HDMI Video Capture and Display design.
...
| Table of Contents | ||
|---|---|---|
|
1 Overview
The primary goal of this Design is to demonstrate the capabilities of VCU hard block present in Zynq UltraScale+ EV devices. The TRD will serve as a platform to tune the performance parameters of VCU and arrive at optimal configurations for encoder and decoder blocks with the streaming use case where bandwidth plays a vital role. 10G will give sufficient bandwidth for the streaming protocol to play video pipeline smoothly.
This design supports the following video interfaces:
...
For Petalinux related limitations please refer: PetaLinux 2020.1 - Product Update Release Notes and Known Issues
For VCU related limitations please refer AR# 66763: LogiCORE H.264/H.265 Video Codec Unit (VCU) - Release Notes and Known Issues, Xilinx Zynq UltraScale+ MPSoC Video Codec Unit and PG252 Link will be added <June-05>.
2.3 Optimum VCU Encoder parameters for use-cases:
...