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(work in progress)

This page provides details on building and customizing the FSBL for Zynq-7000, and important notes on the FSBL. All the information is presented in the format of FAQs.

Table of Contents

Table of Contents
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What are various levels of compilation flags in FSBL?

FSBL supports six levels of compilation flags:

FlagDescription
FSBL_DEBUGSet this flag to enable the logs and message prints.
FSBL_DEBUG_INFOSet this flag to obtain more detailed logs like register and partition header dumps.
FSBL_DEBUG_RSASet this flag to print more detailed intermediate values used in RSA functions.
NON_PS_INSTANTIATE
D_BITSTREAM
Set this flag when the bitstream does not have a PS component. Then the FSBL does not enable level shifters
RSA_SUPPORTSet this flag to enable authentication feature in FSBL.
MMC_SUPPORTSet this flag to enable MMC support in FSBL. When this flag is set, FSBL reads all the partitions from the eMMC device, instead of the primary boot device (which is set by the boot mode pins).

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Boot time (or performance) measurement is a way to measure time taken to complete certain time consuming activities (e.g. partition copy,authentication, decryption etc). In addition, overall time taken by FSBL (measured from after ps7_init completion to completion of all

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all partitions/bitstream loading) is also provided. This feature can be enabled by defining macro FSBL_PERF (in fsbl.h). Debug prints should not be enabled when FSBL_PERF macro is defined.

What are QSPI modes support added in FSBL and reset requirements for large QSPI?

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There are three possible work-arounds for this requirement:

  • Erase the first 32KB of flash and program the boot image at 0x0 + 32KB offset (64KB in the case of dual parallel)
    The BootROM will fail booting from 0x0, will fallback and will boot from 0x0 +32KB offset (see UG585 Zynq-7000-TRM for Boot Partition Search).
  • Program the boot image at 0x0 and Duplicate the Image Header at 0x0 + 16MB offset.
    The BootROM will use the Image Header at 0x0 + 16MB offset and then will boot with the boot image programmed at 0x0.
  • Use only single x1 QSPI mode.

NOTE: If RSA is not used, the boot image can be placed at 0x0 even for larger than 16MB QSPI.

What are the changes required in FSBL for Execute-in-Place (XIP) option for QSPI flash memory?

Please refer to this tech-tip which intends to show how to make a DDR-Less system using Zynq-7000 SoC. It describes about executing boot loader code and application code without DDR. User can take this framework and use it for their specific applications.

Following points are covered in this tip.

  • Shows FSBL XIP execution.
  • Provide sample routine to do preloading of the data/code to L2-cache, in FSBL.
  • Shows L2-cache Lockdown feature in Zynq-7000 SOC.
  • Reference design for AXI Timer in PL.
  • Shows Interrupt working concept.
  • C and C++ application to run in L2-cache lock down mode.

What is Secondary Boot mode?

There is a provision to have two boot devices in the Zynq-7000 architecture. The primary boot mode is the boot mode used by BootROM to load FSBL.

The secondary boot mode is the boot device used by FSBL to load all the other partitions. Zynq-7000 AP devices support eMMC flash devices in MLC and SLC configuration as a secondary boot source. FSBL supports loading the partitions from eMMC. This is possible only when the primary boot mode (set through the boot mode pins) is QSPI.

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