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Topic | Description | Development Board | Links | Latest Version |
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PS-GEM | This blog demonstrates how to bring up the PS-GEM in Versal. | VCK190 | 2020.2 | |
PS and PL based Ethernet | This GitHub repo contains design files demonstrating a PS 10/100/1000BASE-T design utilizing the GEM over MIO to the TI PHY onboard on the VCK190 | VCK190 | 20202021.21 | |
PL 1G Ethernet | This project is about building Versal based AXI 1G/2.5G Ethernet Subsystem example design and testing it by targeting on VCK190 ACAP device using SGMII SFP | VCK190 | https://github.com/Xilinx-Wiki-Projects/VCK190-Ethernet/tree/master/pl_eth_1G | 2020.2 |
MRMAC | This blog covers the key differences between designing with UltraScale+ CMAC and Versal MRMAC. | Any | 2020.2 |
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