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Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository. 

Driver Name

Path in Vitis

Path in Github

qspipsu

<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/qspipsu

https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspipsu


Info

Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/qspipsu


The driver source code is organized into different folders.  The table below shows the qspipsu driver source organization.

Directory
Description

doc

Provides the API and data structure details

data

Driver .tcl and .mdd file

examples

Example applications that show how to use the driver features

src

Driver source files

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 71: Quad SPI Controller in Versal TRM

Features

  1. DMA access (aligned address only)
  2. IO access
  3. Control of two chip selects/bus
  4. Configurable clock
  5. Configurable bus width
  6. Byte Mirror/Stripe operations
  7. Interrupts – will be chosen and enabled internally
  8. SPI NAND flash devices

Known Issues and Limitations


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