Table of Contents

Introduction

...

The SPI bus controller enables communications with a variety of peripherals such as memories, temperature sensors, pressure sensors, analog converters, real-time clocks, displays, and any SD card with serial mode support. The SPI controller can function in master mode with multi-master feature, slave mode, or loopback test mode.

There are two instances of the SPI controller. Both the controllers are identical and independent. The SPI controllers are located in the LPD power domain of the PS. The I/O interfacing options include the PMC and LPD MIO pins. Software accesses the control and status registers via the APB slave programming interface on the LPD IOP switch.

Driver Sources

The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.

Driver Name	Path in Vitis	Path in Github
spips	<Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/spips	https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/spips

Info
Note: To view the sources for a particular release, use the rel-version tag in github.  For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spips

Driver

The driver source code is organized into different folders.

Below diagram

  The table below shows the spips driver source organization.

Directory

spips

Description

|

doc

-- Doc -

Provides the API and data structure details

|
- Examples - Reference application to

data	Driver .tcl and .mdd file
examples	Example applications that show how to use the driver

APIs and calling sequence
|
- Source -

features
src	Driver source files

Features Supported

Commands Supported:

The SPIPS Standalone driver implements basic functionality like READ,PROGRAM and ERASE. These commands are required to read the data from SPI flash and write the data into the SPI flash.
The following list of commands are supported by the Standalone driver:

1. Read Status
2. Read ID
3. Read Page
4. Program Page
5. Erase (Bulk/Block/Chip)

Controller Features Supported:

The following features are supported in the SPIPSU Standalone driver.

Driver Implementation

For a full list of features supported by this IP, please refer Chapter 67: SPI Controller in Versal TRM.

Features

1. Master mode
2. Slave mode
3. All SPI flash instructions
4. Support for 3 slaves - can be extended using a 3 to 8 decoder
5. Driver uses manual chip select and auto start options
6. Programmable clock frequency, polarity and phase
7. Interrupt support

Known

issues

Issues and Limitations

Test cases
Sample output of test cases that are taken from examples folder specified above
SPI FLASH Polled Example Test
Successfully ran SPI FLASH Polled Example TestSPI FLASH Interrupt Example Test
Successfully ran SPI FLASH Interrupt Example Test

Change Log

• 2016.3

  • None

• 2016.4

  • None

• 2017.1

  • None

• 2017.2

  • None

• 2017.3

  • None

• 2017.4

  • None

• 2018.1

  • None

• 2018.2

  • InputClockHz copied into instance pointer to use in application.

• 2018.3

  • None

• 2019.1

  • None

• 2019.2

  • None

• 2020.1

  • None

• 2020.2

  • Summary
    • Updated the Makefile to support parallel make execution
  • Commits
    • 9621f35

Related Links

Title 1 & Link 1

Title 1 & Link 1

Supported Flash vendors

Example Applications

Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications.  These example applications can be imported into the Vitis IDE from the Board Support Package  settings tab

Links to Examples

Examples Path:

https://github.com/Xilinx/embeddedsw/tree/xilinx-v2020.1/XilinxProcessorIPLib/drivers/spips/examples

Test Name	Example Source	Description
SPIPS Interrupt Mode Example	xspips_flash_intr_example.c	This examples does basic read and write test from the SPI-NOR flash device in Interrupt mode
SPIPS PolledMode Example	xspips_flash_polled_example.c	This examples does basic read and write test from the SPI-NOR flash device in Polled mode
SPIPS Self Test Example	xspips_selftest_example.c	This examples does basic hardware connection check
SPIPS Interrupt Mode EEPROM Example	xspips_eeprom_intr_example.c	This examples does basic read and write test from the SPI EEPROM device in Interrupt mode
SPIPS Polled Mode EEPROM Example	xspips_eeprom_polled_example.c	This examples does basic read and write test from the SPI EEPROM device in Polled mode
SPIPS Slave Mode Polled Example	xspips_slave_polled_example.c	This example does basic read write as Slave device in Polled Mode

Example Application Usage

SPIPS Interrupt Mode Example

This examples does basic read and write test from the flash device in Interrupt mode.

SPI FLASH Interrupt Example Test ID : BF ID : 26 ID : 51 ID : BF Successfully ran SPI FLASH Interrupt Example Test

SPIPS Polled Mode Example

This examples does basic read and write test from the flash device in Polled mode.

SPI SerialFlash Polled Example Test ID : BF ID : 26 ID : 51 ID : BF Successfully ran SPI SerialFlash Polled Example Test

SPIPS Self Test Example

This examples does basic hardware connection check.

SPI Selftest Example Successfully ran SPI Selftest Example

Example Design Architecture

NA

Performance

Change Log

2021.1

https://github.com/Xilinx/embeddedsw/blob/xilinx_v2021.1/doc/ChangeLog#L473

2020.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.2/doc/ChangeLog#L1565

2020.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2020.1/doc/ChangeLog#L533

2019.2

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.2/doc/ChangeLog#L82

2019.1

https://github.com/Xilinx/embeddedsw/blob/xilinx-v2019.1/doc/ChangeLog#L159