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Driver Sources
The source code for the driver is included with the Vitis Unified Software Platform installation, as well as being available in the Xilinx Github repository.
Driver name | Path in Vitis | Path in Github |
---|---|---|
canps | <Vitis Install Directory>/data/embedded/XilinxProcessorIPLib/drivers/canps | https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/canps |
Info |
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Note: To view the sources for a particular release, use the rel-version tag in github. For example, for the 2020.1 release, the proper version of the code is: https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/canps |
The driver source code is organized into different folders. The table below shows the canps driver source organization.
Directory | Description |
---|---|
src | Driver source files |
examples | Example applications that show how to use the driver features |
doc | Provides the API and data structure details |
data | Driver .tcl and .mdd file |
Driver Implementation
For a full list of features supported by this IP, please refer Chapter 20: Can Controller in Zynqmp Trm
Features
SupportedController Features:
- Compatible with the ISO 11898 -1, CAN 2.0A, and CAN 2.0B standards
- Standard (11-bit identifier) and extended (29-bit identifier) frames
- Bit rates up to 1 Mb/s
- Transmit message FIFO (TxFIFO) with a depth of 64 messages
- Transmit prioritization through one high-priority transmit buffer (TxHPB
- Watermark interrupts for TxFIFO and RxFIFO
- Automatic re-transmission on errors or arbitration loss in normal mode
- Receive message FIFO (RxFIFO) with a depth of 64 messages
- Four Rx acceptance filters with enables, masks and IDs
- Loop back and snoop modes for diagnostic applications
- Mask able error and status interrupts
- 16-Bit time stamping for receive message
- Readable Rx/Tx error counters
Driver supported Features:
- Supports Standard and extended frames
- Supports Config, Sleep, Normal and snoop modes
- Supports Acceptance filter configurations
- Supports Polled and interrupt modes
- Water mark interrupt support for both Tx and Rx FIFOs
- Supports Transmit prioritization through one high-priority transmit buffer (TxHPB)
Known Issues and Limitations
- None.
Example Applications
Refer to the driver examples directory for various example applications that exercise the different features of the driver. Each application is linked in the table below. The following sections describe the usage and expected output of the various applications. These example applications can be imported into the Vitis IDE from the Board Support Package settings tab....