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Table of Contents

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Component Name
Platform/SoC Supported
Bug Description
Yocto
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC
  • sysroot unable to export qmake path
  • 2018.1 ZynqMP VCU TRD PetaLinux BSP doesn't build with PetaLinux/Yocto SDK generation
  • Yocto/PetaLinux doesn't build when ATF DEBUG is enabled
  • Disabling Busybox utilities in yocto/petalinux
FSBL
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • Zynq UltraScale+ MPSoC FSBL not checking all RSA Enable eFuses.

  • Zynq UltraScale+ MPSoC FSBL bug for secure bitstream on PS only reset.

  • ZCU104 FSBL Errors on boot.

  • Zynq UltraScale+ MPSoC DDR test failed when setting auto self-refresh.

  • Samsung DDR4 requirement of Temp Controlled Refresh Rate.
  • Routine in psu_ddr_phybringup_data Overwriting Original Value in PGCR2.
  • PS DDR - psu_init.c should stop on PLL and calibration errors.
  • Zynq UltraScale+ MPSoC PSW for DDR configurations does not have Refresh mode settings for DDR3/DDR3L//LPDDR3/LPDDR4.
  • Need to review ZDDR settings related to power saving in half-width mode.
PMUFW (Platform Management Unit Firmware)
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • Request for Power off suspend to DDR bare metal application.

  • Linux PM debugfs doesn't work.

  • Idle peripherals before PS and System warm restart.

Arm Trusted Firmware (ATF)
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC
  • None
U-boot
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • eMMC probe failed: -95 because of bug in get_timer().

  • Fix misaligned buffer address when saving envvars to FAT.

  • Zynq UltraScale+ MPSoC unable to erase-verify or write-verify S25FL256SAGBHID10 in X1-Single mode.

Device-tree Generation (DTG)
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • While building Getting device tree error when we add 100G ethernet IP core to design, because of 64-bit value.

  • DTG build errors with AXI DMA Clock nodes.

  • Incorrect interrupt id's being generated in the pl.dtsi.

  • Clock wizard speed grade property error.

  • Syntax error from system.mss when generating dtg bsp from SDK.

  • Incorrect device tree node generated for axi vdma with single frame buffer.

Linux Kernel and Drivers
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • Zynq UltraScale+ MPSoC RSA Driver crashs when data received is less than 512 bytes

  • AXI IIC Linux driver missing bytes while reading from slave.

  • Zynq UltraScale+ MPSoC mtd_debug in I/O mode leads high CPU utilization to impact custom system's behavior.

  • Linux JFFS2 kernel panic on POR or reboot.

  • Macb driver fix for rx bd increment sequence to avoid memory issues.

  • Macb driver - fix PTP time adjustment for large negative delta.
  • Macb driver - fixes for power management and phy & mdio error condition handling. 

  • Zynq UltraScale+ MPSoC AXI GPIO driver probe report "gpio-keys" errors

  • Zynq UltraScale+ MPSoC Unable to mount jffs2 filesystem while booting from QSPI (mt25qu02g ) flash

  • ZCU102 Rev D1/Rev1.1 board - SPI Full-duplex interrupt does does not occurs correctly.

  • ZCU106 SI570 clock registration failed.

  • USB3.0 Ethernet gadget Jumbo frame cannot be sent.

  • Zynq-7000 added support for flash part IS25LP128

  • UBI ECC error on S34ML02G1

  • Zynq-7000 Wake on UART is broken.

  • Incorrect use of __flush_cache_user_range in zynqmp_fpga_ops_write

  • xilinx-ams: vccaux11 outputs 3 times the expected voltage.

  • Zynq UltraScale+ MPSoC DisplayPort Controller Linux Driver does not support both the live input and the DP DMA input as the same time.

  • Zynq UltraScale+ MPSoC DisplayPort Controller Linux Driver always assumes that the DisplayPort output (GTRs) will be used.

  • DMA engine drivers (AXIDMA, VDMA, and CDMA) - Reset DMA channel in dma_terminate_all and fix 64-bit simple CDMA transfer.

OpenAMP and Libmetal
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • Cleanup/Additional information needed in UG1186.

  • fread() returns the number of units have been read.

  • Synchronous External Abort with zynqmp_r5_remoteproc.

  • Observed remoteproc error in dmesg on Zynq-7000 devices.

VCU (Video Codec Unit)
  • Zynq UltraScale+ MPSoC

  • VCU Control Software Decoder Example App Hangs with Long Picture Delays.

  • Recording AVC baseline/high profile not working.

  • VCU Control Software Decoder Example App Hangs with Delayed Picture.

  • QP values not being set when QPCtrlMode set to LOADQP or LOAD_QP | RELATIVE_QP.

  • VCU Control Software Encoder Example App Output Buffer size should be based on bitrate requirements.

  • Video quality degraded with LOW_LATENCY mode.

  • VCU control software fail to release memory after encoding.

  • Unable to get DMABUF buffer from Decoder --> APPSink.

  • Encoder Ports not flushed on Seek event in GStreamer application.

  • Observed DMA fd import issue when video crop element is used in the pipeline.

  • OMX Decoder application doesn't work.

  • Provide (PTS) metadata structure to decoder.

  • I-Frame Flickering Effect with Lower CPBSize

  • Reduce the I-frame from 500KB to 100KB.

  • VCUcontrol software crash when performing multiple concurrent transcoding tasks.

  • VCU sets a lot more Macro blocks to intra or inter-prediction mode instead of skip mode when compared to x264.

  • VCU TRD bitrate overshoot when using VBR.

QEMU
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC
  • ZCU102 QSPI Boot mode.
  • QEMU binaries built from github repo throws gdb connection timeout issue in tap mode.
Xen
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC
  • None
Baremetal BSP, Drivers and Libraries
  • MicroBlaze
  • Zynq-7000
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC

  • Fix for MicroBlaze_sleep in FreeRTOS.

  • DPDMA Example doesn't work on ZCU102 board.

  • Zynq UltraScale+ MPSoC Unable to program bitstream using Xilfpga Library example.

  • Time out error is not handled in master mode standalone drivers.

  • Zynq UltraScale+ MPSoC USB3.0 Hot plug won’t work if USB cable is disconnected during bulk transfer.

  • SDK HDF does not show all address ranges for custom IP.

  • VCU118 Eeprom example doesn't work in SDK.

  • Zynq MPSoC DRAM Test - Running Eye Test Back to Back Seems to Cause a Partial Init of the Controller and reports Read Eye and Read Centering Error.

  • AXI INTC driver does not detect cascaded AXI Interrupt Controllers.

  • XilSecure library doesn't clear user key.

  • XilSecure library doesn't clear user key.

  • Zynq UltraScale+ MPSoC DRAM tests issues found when run write eye test in loop.
  • Zynq UltraScale+ MPSoC DRAM test read eye width is shrinking and AUTO CENTER value mismatches EYE CENTER after thousands of loops.
  • No fallback performed after XFSBL_ERROR_SYSTEM_WDT_RESET.
  • SD read failed when multiple FreeRTOS tasks read from SD card simultaneously.
  • RPU project getting corrupted if imported along with bsp.
  • Zynq UltraScale+ MPSoC DRAM tests fail with Hynix DDR4.
  • Linux call to Sha3Update() fails if payload is not 4 bytes aligned.
  • XSecure_Sha3Update() fails if payload is not 4 bytes aligned.
  • Update Zynq DRAM Diagnostics Tests for Full Memory Range Coverage.
  • Zynq UltraScale+ MPSoC XilFPGA secure does not compile on A53 or R5 bare metal.
  • Zynq-7000 AMP use case the translation table entries (for DDR) are incorrect
  • Peripheral test with multiple timer instances.
  • Zynq-7000 DDRless Flash programming does not work.
  • Xilsf operations at address 0.
  • eFUSE Program Strobe width doc mismatch.
  • XilRSA library documentation.
  • BlockErase for Spansion devices.
  • Possible uninitialized FlashImageOffsetAddress
  • Wrong check for the partition present device in xfsbl_image_header.c
  • Zynq UltraScale+ MPSoC ILA probes on interrupts signals generates different interrupt vectors in xparameters.h
  • Please add Macronix flash in XILSF.
  • Zynq UltraScale+ MPSoC Linux AES Access GCM tag mismatch causes segfault.
  • LWIP - fix phy management for emaclite.
  • CANFD - Fixed the incorrect updation of tx buffer when using message Que.
  • Xilisf: Fixed the address address for block and erase, as they can have non-zero addresses

Related Links

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