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The purpose of this page is to introduce two methods for interacting with GPIO from user space on Zynq-7000 and Zynq Ultrascale+ MPSoC: the SysFs interface and the Linux kernel drivers (gpio-keys, leds-gpio).

The GPIO subsystem is documented in the kernel documentation in Documentation/gpio/.

Note: The SysFs driver has been tested and is working. It has been accepted into the mainline kernel and the old char mode GPIO driver that didn't work with arch/powerpc has been removed from the tree.

Table of Contents

Table of Contents

HW IP Features

ZynqMP

...

The purpose of this page is to introduce two methods for interacting with GPIO from user space on Zynq-7000 and Zynq Ultrascale+ MPSoC: the SysFs interface and the Linux kernel drivers (gpio-keys, leds-gpio).The GPIO subsystem is documented in the kernel documentation in Documentation/gpio/.Note: The SysFs driver has been tested and is working. It has been accepted into the mainline kernel and the old char mode GPIO driver that didn't work with arch/powerpc has been removed from the tree.

Table of Contents
Table of Contents

HW IP Features

Versal

    • The two GPIO controllers have the same functionality. There are a total of 174 channels in two
      controllers:
      PMC GPIO controller:
      • Two banks (26 channels each) to PMC MIO
      • Two banks (32 channels each) to PL EMIO
LPD GPIO controller:
    • One bank (26 channels) to LPD MIO
    • One bank (32 channels) to PL EMIO
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

ZynqMP

  • 78 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 GPIO signals between the PS and PL through the EMIO interface
    • 96 inputs.
    • 192 outputs (96 true outputs and 96 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

Zynq

  • 54 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 192 GPIO signals between the PS and PL through via the EMIO interface

    • 96 inputs.

    • 192 outputs (96 64 Inputs
    • 128 Outputs(64 true outputs and 96 64 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

Zynq

...

54 GPIO signals for device pins

  • Routed through the MIO multiplexer.

  • Outputs are 3-state capable.


192 GPIO signals between the PS and PL via the EMIO interface

...

64 Inputs

...

Features supported in driver

Versal

    • The two GPIO controllers have the same functionality. There are a total of 174 channels in two
      controllers:
      PMC GPIO controller:
      • Two banks (26 channels each) to PMC MIO
      • Two banks (32 channels each) to PL EMIO

LPD GPIO controller:

    • One bank (26 channels) to LPD MIO
    • One bank (32 channels) to PL EMIO
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

Features supported in driver

ZynqMP

  • 78 GPIO signals for device pins
    • Routed through the MIO multiplexer.
    • Outputs are 3-state capable.
  • 288 GPIO signals between the PS and PL through the EMIO interface
    • 96 inputs.
    • 192 outputs (96 true outputs and 96 output enables).
  • The function of each GPIO can be dynamically programmed on an individual or group basis.
  • Enable, bit or bank data write, output enable and direction controls.
  • Programmable interrupts on individual GPIO basis
    • Status read of raw and masked interrupt.
    • Selectable sensitivity: Level-sensitive (High or Low) or edge-sensitive (positive, negative, or both).

...

Code Block
themeMidnight
zynq> cat /sys/class/gpio/
export        gpiochip906/  unexport
zynq> cat /sys/class/gpio/gpiochip906/
base        label       power/      uevent
device/     ngpio       subsystem/
zynq> cat /sys/class/gpio/gpiochip906/label
zynq_gpio
zynq> echo 906 > /sys/class/gpio/export
zynq> echo out > /sys/class/gpio/gpio
gpio906/      gpiochip906/
zynq> echo out > /sys/class/gpio/gpio906/direction
zynq> echo 1 > /sys/class/gpio/gpio906/value
zynq>


Mainline Status

This driver is currently in sync with mainline kernel .Recently sent few patches, Those are applied on mainline, Xilinx 5.10 repo contains those changes.driver.


Change Log

2016.3
Summary:

  • gpio:Added zynq specific check for special pins on bank zero.

Commits:

  • e3296f1 gpio:Added zynq specific check for special pins on bank zero.

...

  • None

...

  • gpio: zynq: Add support for suspend resume
  • gpio: zynq: Wakeup gpio controller when it is used as IRQ controller

Commits:

  • 764c694 gpio: zynq: Add support for suspend resume
  • 6a8c796 gpio: zynq: Wakeup gpio controller when it is used as IRQ controller

...

  • None

...

  • gpio: gpio-zynq.c: Fix kernel doc warnings
  • gpio: gpio-zynq: Fix warnings in the driver
  • gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level
  • gpio: zynq: Clarify quirk and provide helper function
  • gpio: zynq: Provided workaround for GPIO

Commits:

  • 9572161 gpio: gpio-zynq.c: Fix kernel doc warnings
  • a9e595b gpio: gpio-zynq: Fix warnings in the driver
  • 554ae6b gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level
  • 913cf8b gpio: zynq: Clarify quirk and provide helper function
  • 8bc5037 gpio: zynq: Provided workaround for GPIO

...

  • None

...

  • gpio: zynq: Add support for suspend resume

...

2023.2

summary

  • Fix for zynqmp_gpio not an immutable chip warning
  • Remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres

commits

2f674fa - gpio: zynq: fix zynqmp_gpio not an immutable chip warning

f79565a - gpio: synq: remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres

2023.1

  • None

2022.2

  • None

2022.1

  • None

2021.2

  • None

2021.1

  • None

2020.2

  • None

2020.1

Summary

  • gpio:zynq: Remove error prints in EPROBE_DEFER
  • gpio:zynq:use module_platform_driver to simplify the code

commits

9b515a08 - Remove error prints in EPROBE_DEFER

5230a062 - use module_platform_driver to simplify the code

2019.2

summary

  • gpio: zynq: Add pmc gpio support

commits

9d496bd2 - Add pmc gpio support

2019.1

summary:

  • gpio: zynq: Configured zynq gpio's in boot loader stage.
  • gpio: zynq: Added support runtime PM for GPIO
  • gpio: zynq: Disable the irq if it is not a wakeup source

commits:

81e13db - Report gpio direction at boot

d2fe433 - properly support runtime PM for GPIO used as interrupts

65b9290 - Disable the irq if it is not a wakeup source

2018.3

Summary:
  • Remove call to platform_get_irq
  • simplifly getting drvdata
  • Setup chip->base based on alias ID
Commits:

52b64a2 - gpio: zynq: Remove call to platform_get_irq 

eb816d4 - gpio: zynq: simplifly getting drvdata

5dd4162 - gpio: zynq: Setup chip->base based on alias ID

2018.2
Summary:

  • gpio: zynq: protect Protect direction in/out with a spinlock

Commits:

355168 - gpio: zynq: protect direction in/out with a spinlock

2018.

...

1
Summary:

...

  • gpio: zynq: Remove call to platform_get_irq
  • gpio: zynq: simplifly getting drvdata
  • gpio: zynq: Setup chip->base based on alias ID

...

  • 52b64a2 gpio: zynq: Remove call to platform_get_irq 
  • eb816d4 gpio: zynq: simplifly getting drvdata
  • 5dd4162 gpio: zynq: Setup chip->base based on alias ID

2019.1

  • summary:
    • gpio: zynq: Configured zynq gpio's in boot loader stage.
    • gpio: zynq: Added support runtime PM for GPIO
    • gpio: zynq: Disable the irq if it is not a wakeup source
  • commits:
    • 81e13db: Report gpio direction at boot
    • d2fe433:  properly support runtime PM for GPIO used as interrupts
    • 65b9290: Disable the irq if it is not a wakeup source

2019.2

    • summary
      • gpio: zynq: Add pmc gpio support
    • commits

2020.1

  • Summary
    • gpio:zynq: Remove error prints in EPROBE_DEFER
    • gpio:zynq:use module_platform_driver to simplify the code
  • commits
    • 9b515a08 :Remove error prints in EPROBE_DEFER
    • 5230a062 :use module_platform_driver to simplify the code

2020.2

  • Summary
    • None

Related Links

  • Add support for suspend resume

Commits:

e11de4d - gpio: zynq: Add support for suspend resume

2017.4

  • None

2017.3
Summary:

  • Fix kernel doc warnings
  • Fix warnings in the driver
  • Shift zynq_gpio_init() to subsys_initcall level
  • Clarify quirk and provide helper function
  • Provided workaround for GPIO

Commits:

9572161 - gpio: gpio-zynq.c: Fix kernel doc warnings

a9e595b - gpio: gpio-zynq: Fix warnings in the driver

554ae6b - gpio: gpio-zynq: shift zynq_gpio_init() to subsys_initcall level

913cf8b - gpio: zynq: Clarify quirk and provide helper function

8bc5037 - gpio: zynq: Provided workaround for GPIO

2017.2

  • None

2017.1
Summary:

  • Add support for suspend resume
  • Wakeup gpio controller when it is used as IRQ controller

Commits:

764c694 gpio: zynq: Add support for suspend resume

6a8c796 gpio: zynq: Wakeup gpio controller when it is used as IRQ controller

2016.4

  • None

2016.3
Summary:

  • Added zynq specific check for special pins on bank zero.

Commits:

  • e3296f1 - gpio:Added zynq specific check for special pins on bank zero.

Related Links


...