Zynq UltraScale＋ MPSoC VCU TRD 2019.1 - PCIe Transcode

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In the system to card direction, the DMA block moves data from the host memory to the PL-side through PCIe and then writes the data to PS-DDR via AXI-MM interface. Then VCU IP reads data from PS-DDR, performs Video encoding/decoding and writes it back to the same memory. Lastly, in card to system direction, DMA reads PS-DDR via AXI-MM interface and writes to host system memory through PCIe.

Figure 1: VCU PCIe Hardware Block Diagram

Components, Features, and Functions

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2.3 Optimum VCU Encoder parameters for use-cases:

Video streaming:

• Video streaming use-case requires very stable bitrate graph for all pictures.
• It is good to avoid periodic large Intra pictures during the encoding session
• Low-latency rate control (hardware RC) is the preferred control-rate for video streaming, it tries to maintain equal amount frame sizes for all pictures.
• Good to avoid periodic Intra frames instead use low-delay-p (IPPPPP…)
• VBR is not a preferred mode of streaming.

Performance: AVC Encoder settings:

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Quality: Low bitrate AVC encoding:

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