/dts-v1/;

/ {
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	compatible = "xlnx,microblaze";
	model = "Xilinx MicroBlaze";

	cpus {
		#address-cells = <0x1>;
		#cpus = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			bus-handle = <0x1>;
			clock-frequency = <0xbebc200>;
			clocks = <0x2>;
			compatible = "xlnx,microblaze-11.0";
			d-cache-baseaddr = <0x80000000>;
			d-cache-highaddr = <0xbfffffff>;
			d-cache-line-size = <0x20>;
			d-cache-size = <0x4000>;
			device_type = "cpu";
			i-cache-baseaddr = <0x80000000>;
			i-cache-highaddr = <0xbfffffff>;
			i-cache-line-size = <0x20>;
			i-cache-size = <0x4000>;
			interrupt-handle = <0x3>;
			model = "microblaze,11.0";
			reg = <0x0>;
			timebase-frequency = <0xbebc200>;
			xlnx,addr-size = <0x20>;
			xlnx,addr-tag-bits = <0x10>;
			xlnx,allow-dcache-wr = <0x1>;
			xlnx,allow-icache-wr = <0x1>;
			xlnx,area-optimized = <0x0>;
			xlnx,async-interrupt = <0x1>;
			xlnx,async-wakeup = <0x3>;
			xlnx,avoid-primitives = <0x0>;
			xlnx,base-vectors = <0x0 0x0>;
			xlnx,branch-target-cache-size = <0x0>;
			xlnx,cache-byte-size = <0x4000>;
			xlnx,d-axi = <0x1>;
			xlnx,d-lmb = <0x1>;
			xlnx,d-lmb-mon = <0x0>;
			xlnx,d-lmb-protocol = <0x0>;
			xlnx,daddr-size = <0x20>;
			xlnx,data-size = <0x20>;
			xlnx,dc-axi-mon = <0x0>;
			xlnx,dcache-addr-tag = <0x10>;
			xlnx,dcache-always-used = <0x1>;
			xlnx,dcache-byte-size = <0x4000>;
			xlnx,dcache-data-width = <0x0>;
			xlnx,dcache-force-tag-lutram = <0x0>;
			xlnx,dcache-line-len = <0x8>;
			xlnx,dcache-use-writeback = <0x0>;
			xlnx,dcache-victims = <0x0>;
			xlnx,debug-counter-width = <0x20>;
			xlnx,debug-enabled = <0x1>;
			xlnx,debug-event-counters = <0x5>;
			xlnx,debug-external-trace = <0x0>;
			xlnx,debug-interface = <0x0>;
			xlnx,debug-latency-counters = <0x1>;
			xlnx,debug-profile-size = <0x0>;
			xlnx,debug-trace-async-reset = <0x0>;
			xlnx,debug-trace-size = <0x2000>;
			xlnx,div-zero-exception = <0x1>;
			xlnx,dp-axi-mon = <0x0>;
			xlnx,dynamic-bus-sizing = <0x0>;
			xlnx,ecc-use-ce-exception = <0x0>;
			xlnx,edge-is-positive = <0x1>;
			xlnx,enable-discrete-ports = <0x0>;
			xlnx,endianness = <0x1>;
			xlnx,fault-tolerant = <0x0>;
			xlnx,fpu-exception = <0x0>;
			xlnx,freq = <0xbebc200>;
			xlnx,fsl-exception = <0x0>;
			xlnx,fsl-links = <0x0>;
			xlnx,i-axi = <0x0>;
			xlnx,i-lmb = <0x1>;
			xlnx,i-lmb-mon = <0x0>;
			xlnx,i-lmb-protocol = <0x0>;
			xlnx,iaddr-size = <0x20>;
			xlnx,ic-axi-mon = <0x0>;
			xlnx,icache-always-used = <0x1>;
			xlnx,icache-data-width = <0x0>;
			xlnx,icache-force-tag-lutram = <0x1>;
			xlnx,icache-line-len = <0x8>;
			xlnx,icache-streams = <0x1>;
			xlnx,icache-victims = <0x8>;
			xlnx,ill-opcode-exception = <0x1>;
			xlnx,imprecise-exceptions = <0x0>;
			xlnx,instr-size = <0x20>;
			xlnx,interconnect = <0x2>;
			xlnx,interrupt-is-edge = <0x0>;
			xlnx,interrupt-mon = <0x0>;
			xlnx,ip-axi-mon = <0x0>;
			xlnx,lmb-data-size = <0x20>;
			xlnx,lockstep-master = <0x0>;
			xlnx,lockstep-select = <0x0>;
			xlnx,lockstep-slave = <0x0>;
			xlnx,mmu-dtlb-size = <0x4>;
			xlnx,mmu-itlb-size = <0x2>;
			xlnx,mmu-privileged-instr = <0x0>;
			xlnx,mmu-tlb-access = <0x3>;
			xlnx,mmu-zones = <0x2>;
			xlnx,num-sync-ff-clk = <0x2>;
			xlnx,num-sync-ff-clk-debug = <0x2>;
			xlnx,num-sync-ff-clk-irq = <0x1>;
			xlnx,num-sync-ff-dbg-clk = <0x1>;
			xlnx,num-sync-ff-dbg-trace-clk = <0x2>;
			xlnx,number-of-pc-brk = <0x1>;
			xlnx,number-of-rd-addr-brk = <0x0>;
			xlnx,number-of-wr-addr-brk = <0x0>;
			xlnx,opcode-0x0-illegal = <0x1>;
			xlnx,optimization = <0x0>;
			xlnx,pc-width = <0x20>;
			xlnx,piaddr-size = <0x20>;
			xlnx,pvr = <0x2>;
			xlnx,pvr-user1 = <0x0>;
			xlnx,pvr-user2 = <0x0>;
			xlnx,reset-msr = <0x0>;
			xlnx,reset-msr-bip = <0x0>;
			xlnx,reset-msr-dce = <0x0>;
			xlnx,reset-msr-ee = <0x0>;
			xlnx,reset-msr-eip = <0x0>;
			xlnx,reset-msr-ice = <0x0>;
			xlnx,reset-msr-ie = <0x0>;
			xlnx,sco = <0x0>;
			xlnx,trace = <0x0>;
			xlnx,unaligned-exceptions = <0x1>;
			xlnx,use-barrel = <0x1>;
			xlnx,use-branch-target-cache = <0x0>;
			xlnx,use-config-reset = <0x0>;
			xlnx,use-dcache = <0x1>;
			xlnx,use-div = <0x1>;
			xlnx,use-ext-brk = <0x0>;
			xlnx,use-ext-nm-brk = <0x0>;
			xlnx,use-extended-fsl-instr = <0x0>;
			xlnx,use-fpu = <0x2>;
			xlnx,use-hw-mul = <0x2>;
			xlnx,use-icache = <0x1>;
			xlnx,use-interrupt = <0x2>;
			xlnx,use-mmu = <0x3>;
			xlnx,use-msr-instr = <0x1>;
			xlnx,use-non-secure = <0x0>;
			xlnx,use-pcmp-instr = <0x1>;
			xlnx,use-reorder-instr = <0x1>;
			xlnx,use-stack-protection = <0x0>;
		};
	};

	amba_pl {
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		compatible = "simple-bus";
		ranges;
		phandle = <0x1>;


		interrupt-controller@41200000 {
			#interrupt-cells = <0x2>;
			compatible = "xlnx,axi-intc-4.1", "xlnx,xps-intc-1.00.a";
			interrupt-controller;
			reg = <0x41200000 0x10000>;
			xlnx,kind-of-intr = <0x0>;
			xlnx,num-intr-inputs = <0x6>;
			phandle = <0x3>;
		};

		serial@44a00000 {
			clock-frequency = <0xbebc200>;
			clocks = <0x6>;
			compatible = "xlnx,xps-uart16550-2.00.a", "ns16550a";
			current-speed = <0x1c200>;
			device_type = "serial";
			interrupt-names = "ip2intc_irpt";
			interrupt-parent = <0x3>;
			interrupts = <0x0 0x2>;
			port-number = <0x0>;
			reg = <0x44a00000 0x10000>;
			reg-offset = <0x1000>;
			reg-shift = <0x2>;
			xlnx,external-xin-clk-hz = <0x17d7840>;
			xlnx,external-xin-clk-hz-d = <0x19>;
			xlnx,has-external-rclk = <0x0>;
			xlnx,has-external-xin = <0x0>;
			xlnx,is-a-16550 = <0x1>;
			xlnx,s-axi-aclk-freq-hz-d = "200.0";
			xlnx,sim-device = "VERSAL_AI_CORE_ES1";
			xlnx,use-modem-ports = <0x1>;
			xlnx,use-user-ports = <0x1>;
		};
	};

	chosen {
		bootargs = "earlycon";
		stdout-path = "serial0:115200n8";
	};

	aliases {
		serial0 = "/amba_pl/serial@44a00000";
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x40000000>;
	};
};